gwj / at91sam9263 · Commits

Commit e33e94f92298c96e0928cefab00ea5bae0a1cd19

Authored by aurel32
1 parent ca587a8e

target-ppc: use float_flag_divbyzero instead of checking the operands 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6097 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 7 additions and 21 deletions
target-ppc/op_helper.c
  View file @e33e94f
@@ -697,7 +697,7 @@ static always_inline uint64_t fload_invalid_op_excp (int op) @@ -697,7 +697,7 @@ static always_inline uint64_t fload_invalid_op_excp (int op)
697 return ret; 697 return ret;
698 } 698 }
699 699
700 -static always_inline uint64_t float_zero_divide_excp (uint64_t arg1, uint64_t arg2) 700 +static always_inline void float_zero_divide_excp (void)
701 { 701 {
702 env->fpscr |= 1 << FPSCR_ZX; 702 env->fpscr |= 1 << FPSCR_ZX;
703 env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); 703 env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
@@ -710,12 +710,7 @@ static always_inline uint64_t float_zero_divide_excp (uint64_t arg1, uint64_t ar @@ -710,12 +710,7 @@ static always_inline uint64_t float_zero_divide_excp (uint64_t arg1, uint64_t ar
710 helper_raise_exception_err(POWERPC_EXCP_PROGRAM, 710 helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
711 POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX); 711 POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX);
712 } 712 }
713 - } else {  
714 - /* Set the result to infinity */  
715 - arg1 = ((arg1 ^ arg2) & 0x8000000000000000ULL);  
716 - arg1 |= 0x7FFULL << 52;  
717 } 713 }
718 - return arg1;  
719 } 714 }
720 715
721 static always_inline void float_overflow_excp (void) 716 static always_inline void float_overflow_excp (void)
@@ -969,7 +964,9 @@ void helper_float_check_status (void) @@ -969,7 +964,9 @@ void helper_float_check_status (void)
969 helper_raise_exception_err(env->exception_index, env->error_code); 964 helper_raise_exception_err(env->exception_index, env->error_code);
970 } else { 965 } else {
971 int status = get_float_exception_flags(&env->fp_status); 966 int status = get_float_exception_flags(&env->fp_status);
972 - if (status & float_flag_overflow) { 967 + if (status & float_flag_divbyzero) {
  968 + float_zero_divide_excp();
  969 + } else if (status & float_flag_overflow) {
973 float_overflow_excp(); 970 float_overflow_excp();
974 } else if (status & float_flag_underflow) { 971 } else if (status & float_flag_underflow) {
975 float_underflow_excp(); 972 float_underflow_excp();
@@ -1086,14 +1083,9 @@ uint64_t helper_fdiv (uint64_t arg1, uint64_t arg2) @@ -1086,14 +1083,9 @@ uint64_t helper_fdiv (uint64_t arg1, uint64_t arg2)
1086 } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) { 1083 } else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) {
1087 /* Division of infinity by infinity */ 1084 /* Division of infinity by infinity */
1088 farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIDI); 1085 farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIDI);
1089 - } else if (unlikely(!float64_is_nan(farg1.d) && float64_is_zero(farg2.d))) {  
1090 - if (float64_is_zero(farg1.d)) {  
1091 - /* Division of zero by zero */  
1092 - farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXZDZ);  
1093 - } else {  
1094 - /* Division by zero */  
1095 - farg1.ll = float_zero_divide_excp(farg1.d, farg2.d);  
1096 - } 1086 + } else if (unlikely(float64_is_zero(farg1.d) && float64_is_zero(farg2.d))) {
  1087 + /* Division of zero by zero */
  1088 + farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXZDZ);
1097 } else { 1089 } else {
1098 farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); 1090 farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status);
1099 } 1091 }
@@ -1513,9 +1505,6 @@ uint64_t helper_fre (uint64_t arg) @@ -1513,9 +1505,6 @@ uint64_t helper_fre (uint64_t arg)
1513 if (unlikely(float64_is_signaling_nan(farg.d))) { 1505 if (unlikely(float64_is_signaling_nan(farg.d))) {
1514 /* sNaN reciprocal */ 1506 /* sNaN reciprocal */
1515 farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); 1507 farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
1516 - } else if (unlikely(float64_is_zero(farg.d))) {  
1517 - /* Zero reciprocal */  
1518 - farg.ll = float_zero_divide_excp(fone.d, farg.d);  
1519 } else { 1508 } else {
1520 farg.d = float64_div(fone.d, farg.d, &env->fp_status); 1509 farg.d = float64_div(fone.d, farg.d, &env->fp_status);
1521 } 1510 }
@@ -1533,9 +1522,6 @@ uint64_t helper_fres (uint64_t arg) @@ -1533,9 +1522,6 @@ uint64_t helper_fres (uint64_t arg)
1533 if (unlikely(float64_is_signaling_nan(farg.d))) { 1522 if (unlikely(float64_is_signaling_nan(farg.d))) {
1534 /* sNaN reciprocal */ 1523 /* sNaN reciprocal */
1535 farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); 1524 farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
1536 - } else if (unlikely(float64_is_zero(farg.d))) {  
1537 - /* Zero reciprocal */  
1538 - farg.ll = float_zero_divide_excp(fone.d, farg.d);  
1539 } else { 1525 } else {
1540 farg.d = float64_div(fone.d, farg.d, &env->fp_status); 1526 farg.d = float64_div(fone.d, farg.d, &env->fp_status);
1541 f32 = float64_to_float32(farg.d, &env->fp_status); 1527 f32 = float64_to_float32(farg.d, &env->fp_status);