gwj / at91sam9263 · Commits

Commit e32ad5c268041525bf2e11b339609ec6f6d5ad2b

Authored by aurel32
1 parent e1638bd8

target-ppc: fix flags computation for tcg_gen_qemu_st 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5644 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 7 additions and 7 deletions
target-ppc/translate.c
  View file @e32ad5c
@@ -2759,7 +2759,7 @@ static always_inline void gen_qemu_ld64(TCGv arg0, TCGv arg1, int flags) @@ -2759,7 +2759,7 @@ static always_inline void gen_qemu_ld64(TCGv arg0, TCGv arg1, int flags)
2759 2759
2760 static always_inline void gen_qemu_st8(TCGv arg0, TCGv arg1, int flags) 2760 static always_inline void gen_qemu_st8(TCGv arg0, TCGv arg1, int flags)
2761 { 2761 {
2762 - gen_qemu_st8_ppc32(arg0, arg1, flags >> 1); 2762 + gen_qemu_st8_ppc32(arg0, arg1, flags);
2763 } 2763 }
2764 2764
2765 static always_inline void gen_qemu_st16(TCGv arg0, TCGv arg1, int flags) 2765 static always_inline void gen_qemu_st16(TCGv arg0, TCGv arg1, int flags)
@@ -2768,10 +2768,10 @@ static always_inline void gen_qemu_st16(TCGv arg0, TCGv arg1, int flags) @@ -2768,10 +2768,10 @@ static always_inline void gen_qemu_st16(TCGv arg0, TCGv arg1, int flags)
2768 TCGv temp = tcg_temp_new(TCG_TYPE_I32); 2768 TCGv temp = tcg_temp_new(TCG_TYPE_I32);
2769 tcg_gen_ext16u_i32(temp, arg0); 2769 tcg_gen_ext16u_i32(temp, arg0);
2770 tcg_gen_bswap16_i32(temp, temp); 2770 tcg_gen_bswap16_i32(temp, temp);
2771 - gen_qemu_st16_ppc32(temp, arg1, flags >> 1); 2771 + gen_qemu_st16_ppc32(temp, arg1, flags);
2772 tcg_temp_free(temp); 2772 tcg_temp_free(temp);
2773 } else 2773 } else
2774 - gen_qemu_st16_ppc32(arg0, arg1, flags >> 1); 2774 + gen_qemu_st16_ppc32(arg0, arg1, flags);
2775 } 2775 }
2776 2776
2777 static always_inline void gen_qemu_st32(TCGv arg0, TCGv arg1, int flags) 2777 static always_inline void gen_qemu_st32(TCGv arg0, TCGv arg1, int flags)
@@ -2779,10 +2779,10 @@ static always_inline void gen_qemu_st32(TCGv arg0, TCGv arg1, int flags) @@ -2779,10 +2779,10 @@ static always_inline void gen_qemu_st32(TCGv arg0, TCGv arg1, int flags)
2779 if (unlikely(flags & 1)) { 2779 if (unlikely(flags & 1)) {
2780 TCGv temp = tcg_temp_new(TCG_TYPE_I32); 2780 TCGv temp = tcg_temp_new(TCG_TYPE_I32);
2781 tcg_gen_bswap_i32(temp, arg0); 2781 tcg_gen_bswap_i32(temp, arg0);
2782 - gen_qemu_st32_ppc32(temp, arg1, flags >> 1); 2782 + gen_qemu_st32_ppc32(temp, arg1, flags);
2783 tcg_temp_free(temp); 2783 tcg_temp_free(temp);
2784 } else 2784 } else
2785 - gen_qemu_st32_ppc32(arg0, arg1, flags >> 1); 2785 + gen_qemu_st32_ppc32(arg0, arg1, flags);
2786 } 2786 }
2787 2787
2788 static always_inline void gen_qemu_st64(TCGv arg0, TCGv arg1, int flags) 2788 static always_inline void gen_qemu_st64(TCGv arg0, TCGv arg1, int flags)
@@ -2790,10 +2790,10 @@ static always_inline void gen_qemu_st64(TCGv arg0, TCGv arg1, int flags) @@ -2790,10 +2790,10 @@ static always_inline void gen_qemu_st64(TCGv arg0, TCGv arg1, int flags)
2790 if (unlikely(flags & 1)) { 2790 if (unlikely(flags & 1)) {
2791 TCGv temp = tcg_temp_new(TCG_TYPE_I64); 2791 TCGv temp = tcg_temp_new(TCG_TYPE_I64);
2792 tcg_gen_bswap_i64(temp, arg0); 2792 tcg_gen_bswap_i64(temp, arg0);
2793 - gen_qemu_st64_ppc32(temp, arg1, flags >> 1); 2793 + gen_qemu_st64_ppc32(temp, arg1, flags);
2794 tcg_temp_free(temp); 2794 tcg_temp_free(temp);
2795 } else 2795 } else
2796 - gen_qemu_st64_ppc32(arg0, arg1, flags >> 1); 2796 + gen_qemu_st64_ppc32(arg0, arg1, flags);
2797 } 2797 }
2798 2798
2799 #endif 2799 #endif