Commit e18231a3ffe12a1f2004964594c7dd8ba3f78f33
1 parent
35f4b58c
Show size for unassigned accesses (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
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8 changed files
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72 additions
and
33 deletions
exec-all.h
| @@ -331,7 +331,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr) | @@ -331,7 +331,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr) | ||
| 331 | pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK; | 331 | pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK; |
| 332 | if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) { | 332 | if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) { |
| 333 | #if defined(TARGET_SPARC) || defined(TARGET_MIPS) | 333 | #if defined(TARGET_SPARC) || defined(TARGET_MIPS) |
| 334 | - do_unassigned_access(addr, 0, 1, 0); | 334 | + do_unassigned_access(addr, 0, 1, 0, 4); |
| 335 | #else | 335 | #else |
| 336 | cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr); | 336 | cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr); |
| 337 | #endif | 337 | #endif |
exec.c
| @@ -2302,10 +2302,30 @@ static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr) | @@ -2302,10 +2302,30 @@ static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr) | ||
| 2302 | #ifdef DEBUG_UNASSIGNED | 2302 | #ifdef DEBUG_UNASSIGNED |
| 2303 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | 2303 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); |
| 2304 | #endif | 2304 | #endif |
| 2305 | -#ifdef TARGET_SPARC | ||
| 2306 | - do_unassigned_access(addr, 0, 0, 0); | ||
| 2307 | -#elif defined(TARGET_CRIS) | ||
| 2308 | - do_unassigned_access(addr, 0, 0, 0); | 2305 | +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) |
| 2306 | + do_unassigned_access(addr, 0, 0, 0, 1); | ||
| 2307 | +#endif | ||
| 2308 | + return 0; | ||
| 2309 | +} | ||
| 2310 | + | ||
| 2311 | +static uint32_t unassigned_mem_readw(void *opaque, target_phys_addr_t addr) | ||
| 2312 | +{ | ||
| 2313 | +#ifdef DEBUG_UNASSIGNED | ||
| 2314 | + printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | ||
| 2315 | +#endif | ||
| 2316 | +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) | ||
| 2317 | + do_unassigned_access(addr, 0, 0, 0, 2); | ||
| 2318 | +#endif | ||
| 2319 | + return 0; | ||
| 2320 | +} | ||
| 2321 | + | ||
| 2322 | +static uint32_t unassigned_mem_readl(void *opaque, target_phys_addr_t addr) | ||
| 2323 | +{ | ||
| 2324 | +#ifdef DEBUG_UNASSIGNED | ||
| 2325 | + printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | ||
| 2326 | +#endif | ||
| 2327 | +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) | ||
| 2328 | + do_unassigned_access(addr, 0, 0, 0, 4); | ||
| 2309 | #endif | 2329 | #endif |
| 2310 | return 0; | 2330 | return 0; |
| 2311 | } | 2331 | } |
| @@ -2315,23 +2335,41 @@ static void unassigned_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_ | @@ -2315,23 +2335,41 @@ static void unassigned_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_ | ||
| 2315 | #ifdef DEBUG_UNASSIGNED | 2335 | #ifdef DEBUG_UNASSIGNED |
| 2316 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); | 2336 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); |
| 2317 | #endif | 2337 | #endif |
| 2318 | -#ifdef TARGET_SPARC | ||
| 2319 | - do_unassigned_access(addr, 1, 0, 0); | ||
| 2320 | -#elif defined(TARGET_CRIS) | ||
| 2321 | - do_unassigned_access(addr, 1, 0, 0); | 2338 | +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) |
| 2339 | + do_unassigned_access(addr, 1, 0, 0, 1); | ||
| 2340 | +#endif | ||
| 2341 | +} | ||
| 2342 | + | ||
| 2343 | +static void unassigned_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) | ||
| 2344 | +{ | ||
| 2345 | +#ifdef DEBUG_UNASSIGNED | ||
| 2346 | + printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); | ||
| 2347 | +#endif | ||
| 2348 | +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) | ||
| 2349 | + do_unassigned_access(addr, 1, 0, 0, 2); | ||
| 2350 | +#endif | ||
| 2351 | +} | ||
| 2352 | + | ||
| 2353 | +static void unassigned_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) | ||
| 2354 | +{ | ||
| 2355 | +#ifdef DEBUG_UNASSIGNED | ||
| 2356 | + printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); | ||
| 2357 | +#endif | ||
| 2358 | +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) | ||
| 2359 | + do_unassigned_access(addr, 1, 0, 0, 4); | ||
| 2322 | #endif | 2360 | #endif |
| 2323 | } | 2361 | } |
| 2324 | 2362 | ||
| 2325 | static CPUReadMemoryFunc *unassigned_mem_read[3] = { | 2363 | static CPUReadMemoryFunc *unassigned_mem_read[3] = { |
| 2326 | unassigned_mem_readb, | 2364 | unassigned_mem_readb, |
| 2327 | - unassigned_mem_readb, | ||
| 2328 | - unassigned_mem_readb, | 2365 | + unassigned_mem_readw, |
| 2366 | + unassigned_mem_readl, | ||
| 2329 | }; | 2367 | }; |
| 2330 | 2368 | ||
| 2331 | static CPUWriteMemoryFunc *unassigned_mem_write[3] = { | 2369 | static CPUWriteMemoryFunc *unassigned_mem_write[3] = { |
| 2332 | unassigned_mem_writeb, | 2370 | unassigned_mem_writeb, |
| 2333 | - unassigned_mem_writeb, | ||
| 2334 | - unassigned_mem_writeb, | 2371 | + unassigned_mem_writew, |
| 2372 | + unassigned_mem_writel, | ||
| 2335 | }; | 2373 | }; |
| 2336 | 2374 | ||
| 2337 | static void notdirty_mem_writeb(void *opaque, target_phys_addr_t ram_addr, | 2375 | static void notdirty_mem_writeb(void *opaque, target_phys_addr_t ram_addr, |
target-cris/cpu.h
| @@ -168,7 +168,7 @@ void do_interrupt(CPUCRISState *env); | @@ -168,7 +168,7 @@ void do_interrupt(CPUCRISState *env); | ||
| 168 | int cpu_cris_signal_handler(int host_signum, void *pinfo, | 168 | int cpu_cris_signal_handler(int host_signum, void *pinfo, |
| 169 | void *puc); | 169 | void *puc); |
| 170 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 170 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 171 | - int is_asi); | 171 | + int is_asi, int size); |
| 172 | 172 | ||
| 173 | enum { | 173 | enum { |
| 174 | CC_OP_DYNAMIC, /* Use env->cc_op */ | 174 | CC_OP_DYNAMIC, /* Use env->cc_op */ |
target-cris/op_helper.c
| @@ -237,10 +237,10 @@ void helper_rfn(void) | @@ -237,10 +237,10 @@ void helper_rfn(void) | ||
| 237 | } | 237 | } |
| 238 | 238 | ||
| 239 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 239 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 240 | - int is_asi) | 240 | + int is_asi, int size) |
| 241 | { | 241 | { |
| 242 | - D(printf("%s addr=%x w=%d ex=%d asi=%d\n", | ||
| 243 | - __func__, addr, is_write, is_exec, is_asi)); | 242 | + D(printf("%s addr=%x w=%d ex=%d asi=%d, size=%d\n", |
| 243 | + __func__, addr, is_write, is_exec, is_asi, size)); | ||
| 244 | } | 244 | } |
| 245 | 245 | ||
| 246 | static void evaluate_flags_writeback(uint32_t flags) | 246 | static void evaluate_flags_writeback(uint32_t flags) |
target-mips/cpu.h
| @@ -470,7 +470,7 @@ void r4k_do_tlbr (void); | @@ -470,7 +470,7 @@ void r4k_do_tlbr (void); | ||
| 470 | void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); | 470 | void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); |
| 471 | 471 | ||
| 472 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 472 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 473 | - int unused); | 473 | + int unused, int size); |
| 474 | 474 | ||
| 475 | #define CPUState CPUMIPSState | 475 | #define CPUState CPUMIPSState |
| 476 | #define cpu_init cpu_mips_init | 476 | #define cpu_init cpu_mips_init |
target-mips/op_helper.c
| @@ -1911,7 +1911,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) | @@ -1911,7 +1911,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) | ||
| 1911 | } | 1911 | } |
| 1912 | 1912 | ||
| 1913 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 1913 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 1914 | - int unused) | 1914 | + int unused, int size) |
| 1915 | { | 1915 | { |
| 1916 | if (is_exec) | 1916 | if (is_exec) |
| 1917 | do_raise_exception(EXCP_IBE); | 1917 | do_raise_exception(EXCP_IBE); |
target-sparc/cpu.h
| @@ -430,7 +430,7 @@ static inline void PUT_CWP64(CPUSPARCState *env1, int cwp) | @@ -430,7 +430,7 @@ static inline void PUT_CWP64(CPUSPARCState *env1, int cwp) | ||
| 430 | 430 | ||
| 431 | /* cpu-exec.c */ | 431 | /* cpu-exec.c */ |
| 432 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 432 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 433 | - int is_asi); | 433 | + int is_asi, int size); |
| 434 | int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); | 434 | int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); |
| 435 | 435 | ||
| 436 | #define CPUState CPUSPARCState | 436 | #define CPUState CPUSPARCState |
target-sparc/op_helper.c
| @@ -950,7 +950,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) | @@ -950,7 +950,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) | ||
| 950 | break; | 950 | break; |
| 951 | case 8: /* User code access, XXX */ | 951 | case 8: /* User code access, XXX */ |
| 952 | default: | 952 | default: |
| 953 | - do_unassigned_access(addr, 0, 0, asi); | 953 | + do_unassigned_access(addr, 0, 0, asi, size); |
| 954 | ret = 0; | 954 | ret = 0; |
| 955 | break; | 955 | break; |
| 956 | } | 956 | } |
| @@ -1284,7 +1284,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) | @@ -1284,7 +1284,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) | ||
| 1284 | case 8: /* User code access, XXX */ | 1284 | case 8: /* User code access, XXX */ |
| 1285 | case 9: /* Supervisor code access, XXX */ | 1285 | case 9: /* Supervisor code access, XXX */ |
| 1286 | default: | 1286 | default: |
| 1287 | - do_unassigned_access(addr, 1, 0, asi); | 1287 | + do_unassigned_access(addr, 1, 0, asi, size); |
| 1288 | break; | 1288 | break; |
| 1289 | } | 1289 | } |
| 1290 | #ifdef DEBUG_ASI | 1290 | #ifdef DEBUG_ASI |
| @@ -1464,7 +1464,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) | @@ -1464,7 +1464,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) | ||
| 1464 | case 0x8a: // Primary no-fault LE, RO | 1464 | case 0x8a: // Primary no-fault LE, RO |
| 1465 | case 0x8b: // Secondary no-fault LE, RO | 1465 | case 0x8b: // Secondary no-fault LE, RO |
| 1466 | default: | 1466 | default: |
| 1467 | - do_unassigned_access(addr, 1, 0, 1); | 1467 | + do_unassigned_access(addr, 1, 0, 1, size); |
| 1468 | return; | 1468 | return; |
| 1469 | } | 1469 | } |
| 1470 | } | 1470 | } |
| @@ -1675,7 +1675,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) | @@ -1675,7 +1675,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) | ||
| 1675 | case 0x5f: // D-MMU demap, WO | 1675 | case 0x5f: // D-MMU demap, WO |
| 1676 | case 0x77: // Interrupt vector, WO | 1676 | case 0x77: // Interrupt vector, WO |
| 1677 | default: | 1677 | default: |
| 1678 | - do_unassigned_access(addr, 0, 0, 1); | 1678 | + do_unassigned_access(addr, 0, 0, 1, size); |
| 1679 | ret = 0; | 1679 | ret = 0; |
| 1680 | break; | 1680 | break; |
| 1681 | } | 1681 | } |
| @@ -2082,7 +2082,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) | @@ -2082,7 +2082,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) | ||
| 2082 | case 0x8a: // Primary no-fault LE, RO | 2082 | case 0x8a: // Primary no-fault LE, RO |
| 2083 | case 0x8b: // Secondary no-fault LE, RO | 2083 | case 0x8b: // Secondary no-fault LE, RO |
| 2084 | default: | 2084 | default: |
| 2085 | - do_unassigned_access(addr, 1, 0, 1); | 2085 | + do_unassigned_access(addr, 1, 0, 1, size); |
| 2086 | return; | 2086 | return; |
| 2087 | } | 2087 | } |
| 2088 | } | 2088 | } |
| @@ -3025,7 +3025,7 @@ void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) | @@ -3025,7 +3025,7 @@ void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) | ||
| 3025 | 3025 | ||
| 3026 | #ifndef TARGET_SPARC64 | 3026 | #ifndef TARGET_SPARC64 |
| 3027 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 3027 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 3028 | - int is_asi) | 3028 | + int is_asi, int size) |
| 3029 | { | 3029 | { |
| 3030 | CPUState *saved_env; | 3030 | CPUState *saved_env; |
| 3031 | 3031 | ||
| @@ -3035,14 +3035,15 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | @@ -3035,14 +3035,15 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | ||
| 3035 | env = cpu_single_env; | 3035 | env = cpu_single_env; |
| 3036 | #ifdef DEBUG_UNASSIGNED | 3036 | #ifdef DEBUG_UNASSIGNED |
| 3037 | if (is_asi) | 3037 | if (is_asi) |
| 3038 | - printf("Unassigned mem %s access to " TARGET_FMT_plx | 3038 | + printf("Unassigned mem %s access of %d byte%s to " TARGET_FMT_plx |
| 3039 | " asi 0x%02x from " TARGET_FMT_lx "\n", | 3039 | " asi 0x%02x from " TARGET_FMT_lx "\n", |
| 3040 | - is_exec ? "exec" : is_write ? "write" : "read", addr, is_asi, | ||
| 3041 | - env->pc); | 3040 | + is_exec ? "exec" : is_write ? "write" : "read", size, |
| 3041 | + size == 1 ? "" : "s", addr, is_asi, env->pc); | ||
| 3042 | else | 3042 | else |
| 3043 | - printf("Unassigned mem %s access to " TARGET_FMT_plx " from " | ||
| 3044 | - TARGET_FMT_lx "\n", | ||
| 3045 | - is_exec ? "exec" : is_write ? "write" : "read", addr, env->pc); | 3043 | + printf("Unassigned mem %s access of %d byte%s to " TARGET_FMT_plx |
| 3044 | + " from " TARGET_FMT_lx "\n", | ||
| 3045 | + is_exec ? "exec" : is_write ? "write" : "read", size, | ||
| 3046 | + size == 1 ? "" : "s", addr, env->pc); | ||
| 3046 | #endif | 3047 | #endif |
| 3047 | if (env->mmuregs[3]) /* Fault status register */ | 3048 | if (env->mmuregs[3]) /* Fault status register */ |
| 3048 | env->mmuregs[3] = 1; /* overflow (not read before another fault) */ | 3049 | env->mmuregs[3] = 1; /* overflow (not read before another fault) */ |
| @@ -3066,7 +3067,7 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | @@ -3066,7 +3067,7 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | ||
| 3066 | } | 3067 | } |
| 3067 | #else | 3068 | #else |
| 3068 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, | 3069 | void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
| 3069 | - int is_asi) | 3070 | + int is_asi, int size) |
| 3070 | { | 3071 | { |
| 3071 | #ifdef DEBUG_UNASSIGNED | 3072 | #ifdef DEBUG_UNASSIGNED |
| 3072 | CPUState *saved_env; | 3073 | CPUState *saved_env; |