Commit e160c51ccd14a9df2628a3b31d06fd26333d6f99
1 parent
579a97f7
Fix msr_mask.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3584 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
1 changed file
with
3 additions
and
4 deletions
target-arm/translate.c
| @@ -2478,7 +2478,6 @@ static inline void gen_mulxy(int x, int y) | @@ -2478,7 +2478,6 @@ static inline void gen_mulxy(int x, int y) | ||
| 2478 | /* Return the mask of PSR bits set by a MSR instruction. */ | 2478 | /* Return the mask of PSR bits set by a MSR instruction. */ |
| 2479 | static uint32_t msr_mask(CPUState *env, DisasContext *s, int flags, int spsr) { | 2479 | static uint32_t msr_mask(CPUState *env, DisasContext *s, int flags, int spsr) { |
| 2480 | uint32_t mask; | 2480 | uint32_t mask; |
| 2481 | - uint32_t reserved; | ||
| 2482 | 2481 | ||
| 2483 | mask = 0; | 2482 | mask = 0; |
| 2484 | if (flags & (1 << 0)) | 2483 | if (flags & (1 << 0)) |
| @@ -2493,12 +2492,12 @@ static uint32_t msr_mask(CPUState *env, DisasContext *s, int flags, int spsr) { | @@ -2493,12 +2492,12 @@ static uint32_t msr_mask(CPUState *env, DisasContext *s, int flags, int spsr) { | ||
| 2493 | /* Mask out undefined bits. */ | 2492 | /* Mask out undefined bits. */ |
| 2494 | mask &= ~CPSR_RESERVED; | 2493 | mask &= ~CPSR_RESERVED; |
| 2495 | if (!arm_feature(env, ARM_FEATURE_V6)) | 2494 | if (!arm_feature(env, ARM_FEATURE_V6)) |
| 2496 | - reserved &= ~(CPSR_E | CPSR_GE); | 2495 | + mask &= ~(CPSR_E | CPSR_GE); |
| 2497 | if (!arm_feature(env, ARM_FEATURE_THUMB2)) | 2496 | if (!arm_feature(env, ARM_FEATURE_THUMB2)) |
| 2498 | - reserved &= ~CPSR_IT; | 2497 | + mask &= ~CPSR_IT; |
| 2499 | /* Mask out execution state bits. */ | 2498 | /* Mask out execution state bits. */ |
| 2500 | if (!spsr) | 2499 | if (!spsr) |
| 2501 | - reserved &= ~CPSR_EXEC; | 2500 | + mask &= ~CPSR_EXEC; |
| 2502 | /* Mask out privileged bits. */ | 2501 | /* Mask out privileged bits. */ |
| 2503 | if (IS_USER(s)) | 2502 | if (IS_USER(s)) |
| 2504 | mask &= CPSR_USER; | 2503 | mask &= CPSR_USER; |