Commit dee96f6ca300da3dc3bc97635d9c3d97a73b5e48

Authored by j_mayer
1 parent 58a7d328

PowerPC emulation optimization:

avoid stopping translation after most SPR updates
when a context-synchronization instruction is also needed.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3265 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/translate.c
@@ -3230,7 +3230,8 @@ GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001FF801, PPC_64B) @@ -3230,7 +3230,8 @@ GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001FF801, PPC_64B)
3230 gen_op_load_gpr_T0(rS(ctx->opcode)); 3230 gen_op_load_gpr_T0(rS(ctx->opcode));
3231 gen_op_store_msr(); 3231 gen_op_store_msr();
3232 /* Must stop the translation as machine state (may have) changed */ 3232 /* Must stop the translation as machine state (may have) changed */
3233 - GEN_SYNC(ctx); 3233 + /* Note that mtmsr is not always defined as context-synchronizing */
  3234 + GEN_STOP(ctx);
3234 #endif 3235 #endif
3235 } 3236 }
3236 #endif 3237 #endif
@@ -3253,7 +3254,8 @@ GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC) @@ -3253,7 +3254,8 @@ GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC)
3253 #endif 3254 #endif
3254 gen_op_store_msr(); 3255 gen_op_store_msr();
3255 /* Must stop the translation as machine state (may have) changed */ 3256 /* Must stop the translation as machine state (may have) changed */
3256 - GEN_SYNC(ctx); 3257 + /* Note that mtmsrd is not always defined as context-synchronizing */
  3258 + GEN_STOP(ctx);
3257 #endif 3259 #endif
3258 } 3260 }
3259 3261
@@ -4936,6 +4938,9 @@ GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_EMB_COMMON) @@ -4936,6 +4938,9 @@ GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_EMB_COMMON)
4936 } 4938 }
4937 gen_op_load_gpr_T0(rD(ctx->opcode)); 4939 gen_op_load_gpr_T0(rD(ctx->opcode));
4938 gen_op_wrte(); 4940 gen_op_wrte();
  4941 + /* Stop translation to have a chance to raise an exception
  4942 + * if we just set msr_ee to 1
  4943 + */
4939 GEN_STOP(ctx); 4944 GEN_STOP(ctx);
4940 #endif 4945 #endif
4941 } 4946 }
@@ -4952,6 +4957,9 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_EMB_COMMON) @@ -4952,6 +4957,9 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_EMB_COMMON)
4952 } 4957 }
4953 gen_op_set_T0(ctx->opcode & 0x00010000); 4958 gen_op_set_T0(ctx->opcode & 0x00010000);
4954 gen_op_wrte(); 4959 gen_op_wrte();
  4960 + /* Stop translation to have a chance to raise an exception
  4961 + * if we just set msr_ee to 1
  4962 + */
4955 GEN_STOP(ctx); 4963 GEN_STOP(ctx);
4956 #endif 4964 #endif
4957 } 4965 }
target-ppc/translate_init.c
@@ -189,34 +189,22 @@ static void spr_read_ibat_h (void *opaque, int sprn) @@ -189,34 +189,22 @@ static void spr_read_ibat_h (void *opaque, int sprn)
189 189
190 static void spr_write_ibatu (void *opaque, int sprn) 190 static void spr_write_ibatu (void *opaque, int sprn)
191 { 191 {
192 - DisasContext *ctx = opaque;  
193 -  
194 gen_op_store_ibatu((sprn - SPR_IBAT0U) / 2); 192 gen_op_store_ibatu((sprn - SPR_IBAT0U) / 2);
195 - GEN_STOP(ctx);  
196 } 193 }
197 194
198 static void spr_write_ibatu_h (void *opaque, int sprn) 195 static void spr_write_ibatu_h (void *opaque, int sprn)
199 { 196 {
200 - DisasContext *ctx = opaque;  
201 -  
202 gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2); 197 gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);
203 - GEN_STOP(ctx);  
204 } 198 }
205 199
206 static void spr_write_ibatl (void *opaque, int sprn) 200 static void spr_write_ibatl (void *opaque, int sprn)
207 { 201 {
208 - DisasContext *ctx = opaque;  
209 -  
210 gen_op_store_ibatl((sprn - SPR_IBAT0L) / 2); 202 gen_op_store_ibatl((sprn - SPR_IBAT0L) / 2);
211 - GEN_STOP(ctx);  
212 } 203 }
213 204
214 static void spr_write_ibatl_h (void *opaque, int sprn) 205 static void spr_write_ibatl_h (void *opaque, int sprn)
215 { 206 {
216 - DisasContext *ctx = opaque;  
217 -  
218 gen_op_store_ibatl((sprn - SPR_IBAT4L) / 2); 207 gen_op_store_ibatl((sprn - SPR_IBAT4L) / 2);
219 - GEN_STOP(ctx);  
220 } 208 }
221 209
222 /* DBAT0U...DBAT7U */ 210 /* DBAT0U...DBAT7U */
@@ -233,34 +221,22 @@ static void spr_read_dbat_h (void *opaque, int sprn) @@ -233,34 +221,22 @@ static void spr_read_dbat_h (void *opaque, int sprn)
233 221
234 static void spr_write_dbatu (void *opaque, int sprn) 222 static void spr_write_dbatu (void *opaque, int sprn)
235 { 223 {
236 - DisasContext *ctx = opaque;  
237 -  
238 gen_op_store_dbatu((sprn - SPR_DBAT0U) / 2); 224 gen_op_store_dbatu((sprn - SPR_DBAT0U) / 2);
239 - GEN_STOP(ctx);  
240 } 225 }
241 226
242 static void spr_write_dbatu_h (void *opaque, int sprn) 227 static void spr_write_dbatu_h (void *opaque, int sprn)
243 { 228 {
244 - DisasContext *ctx = opaque;  
245 -  
246 gen_op_store_dbatu((sprn - SPR_DBAT4U) / 2); 229 gen_op_store_dbatu((sprn - SPR_DBAT4U) / 2);
247 - GEN_STOP(ctx);  
248 } 230 }
249 231
250 static void spr_write_dbatl (void *opaque, int sprn) 232 static void spr_write_dbatl (void *opaque, int sprn)
251 { 233 {
252 - DisasContext *ctx = opaque;  
253 -  
254 gen_op_store_dbatl((sprn - SPR_DBAT0L) / 2); 234 gen_op_store_dbatl((sprn - SPR_DBAT0L) / 2);
255 - GEN_STOP(ctx);  
256 } 235 }
257 236
258 static void spr_write_dbatl_h (void *opaque, int sprn) 237 static void spr_write_dbatl_h (void *opaque, int sprn)
259 { 238 {
260 - DisasContext *ctx = opaque;  
261 -  
262 gen_op_store_dbatl((sprn - SPR_DBAT4L) / 2); 239 gen_op_store_dbatl((sprn - SPR_DBAT4L) / 2);
263 - GEN_STOP(ctx);  
264 } 240 }
265 241
266 /* SDR1 */ 242 /* SDR1 */
@@ -271,10 +247,7 @@ static void spr_read_sdr1 (void *opaque, int sprn) @@ -271,10 +247,7 @@ static void spr_read_sdr1 (void *opaque, int sprn)
271 247
272 static void spr_write_sdr1 (void *opaque, int sprn) 248 static void spr_write_sdr1 (void *opaque, int sprn)
273 { 249 {
274 - DisasContext *ctx = opaque;  
275 -  
276 gen_op_store_sdr1(); 250 gen_op_store_sdr1();
277 - GEN_STOP(ctx);  
278 } 251 }
279 252
280 /* 64 bits PowerPC specific SPRs */ 253 /* 64 bits PowerPC specific SPRs */
@@ -291,7 +264,6 @@ static void spr_write_asr (void *opaque, int sprn) @@ -291,7 +264,6 @@ static void spr_write_asr (void *opaque, int sprn)
291 DisasContext *ctx = opaque; 264 DisasContext *ctx = opaque;
292 265
293 gen_op_store_asr(); 266 gen_op_store_asr();
294 - GEN_STOP(ctx);  
295 } 267 }
296 #endif 268 #endif
297 #endif 269 #endif
@@ -329,18 +301,12 @@ static void spr_read_601_ubat (void *opaque, int sprn) @@ -329,18 +301,12 @@ static void spr_read_601_ubat (void *opaque, int sprn)
329 301
330 static void spr_write_601_ubatu (void *opaque, int sprn) 302 static void spr_write_601_ubatu (void *opaque, int sprn)
331 { 303 {
332 - DisasContext *ctx = opaque;  
333 -  
334 gen_op_store_601_batu((sprn - SPR_IBAT0U) / 2); 304 gen_op_store_601_batu((sprn - SPR_IBAT0U) / 2);
335 - GEN_STOP(ctx);  
336 } 305 }
337 306
338 static void spr_write_601_ubatl (void *opaque, int sprn) 307 static void spr_write_601_ubatl (void *opaque, int sprn)
339 { 308 {
340 - DisasContext *ctx = opaque;  
341 -  
342 gen_op_store_601_batl((sprn - SPR_IBAT0L) / 2); 309 gen_op_store_601_batl((sprn - SPR_IBAT0L) / 2);
343 - GEN_STOP(ctx);  
344 } 310 }
345 #endif 311 #endif
346 312
@@ -367,13 +333,7 @@ static void spr_write_40x_dbcr0 (void *opaque, int sprn) @@ -367,13 +333,7 @@ static void spr_write_40x_dbcr0 (void *opaque, int sprn)
367 333
368 static void spr_write_40x_sler (void *opaque, int sprn) 334 static void spr_write_40x_sler (void *opaque, int sprn)
369 { 335 {
370 - DisasContext *ctx = opaque;  
371 -  
372 gen_op_store_40x_sler(); 336 gen_op_store_40x_sler();
373 - /* We must stop the translation as we may have changed  
374 - * some regions endianness  
375 - */  
376 - GEN_STOP(ctx);  
377 } 337 }
378 338
379 static void spr_write_booke_tcr (void *opaque, int sprn) 339 static void spr_write_booke_tcr (void *opaque, int sprn)
@@ -397,10 +357,7 @@ static void spr_read_403_pbr (void *opaque, int sprn) @@ -397,10 +357,7 @@ static void spr_read_403_pbr (void *opaque, int sprn)
397 357
398 static void spr_write_403_pbr (void *opaque, int sprn) 358 static void spr_write_403_pbr (void *opaque, int sprn)
399 { 359 {
400 - DisasContext *ctx = opaque;  
401 -  
402 gen_op_store_403_pb(sprn - SPR_403_PBL1); 360 gen_op_store_403_pb(sprn - SPR_403_PBL1);
403 - GEN_STOP(ctx);  
404 } 361 }
405 362
406 static void spr_write_pir (void *opaque, int sprn) 363 static void spr_write_pir (void *opaque, int sprn)