Commit ded9d29547922ba1ade973d6031313411c98e214
1 parent
662bbadd
ARM: fix usad8 and usada8 usage of registers (Mans Rullgard).
This fixes the destination and accumulator registers for the usad8 and usada8 instructions. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5912 c046a42c-6fe2-441c-8c8c-71466251a162
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target-arm/translate.c
| @@ -6556,12 +6556,12 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) | @@ -6556,12 +6556,12 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) | ||
| 6556 | tmp2 = load_reg(s, rs); | 6556 | tmp2 = load_reg(s, rs); |
| 6557 | gen_helper_usad8(tmp, tmp, tmp2); | 6557 | gen_helper_usad8(tmp, tmp, tmp2); |
| 6558 | dead_tmp(tmp2); | 6558 | dead_tmp(tmp2); |
| 6559 | - if (rn != 15) { | ||
| 6560 | - tmp2 = load_reg(s, rn); | 6559 | + if (rd != 15) { |
| 6560 | + tmp2 = load_reg(s, rd); | ||
| 6561 | tcg_gen_add_i32(tmp, tmp, tmp2); | 6561 | tcg_gen_add_i32(tmp, tmp, tmp2); |
| 6562 | dead_tmp(tmp2); | 6562 | dead_tmp(tmp2); |
| 6563 | } | 6563 | } |
| 6564 | - store_reg(s, rd, tmp); | 6564 | + store_reg(s, rn, tmp); |
| 6565 | break; | 6565 | break; |
| 6566 | case 0x20: case 0x24: case 0x28: case 0x2c: | 6566 | case 0x20: case 0x24: case 0x28: case 0x2c: |
| 6567 | /* Bitfield insert/clear. */ | 6567 | /* Bitfield insert/clear. */ |