Commit ded3ab80dd384715dff3741e4ac8a015933cb180

Authored by pbrook
1 parent 908f52b0

Sparc64 insn fixes (Blue Swirl).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1993 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 36 additions and 11 deletions
target-sparc/translate.c
... ... @@ -1123,7 +1123,11 @@ static void disas_sparc_insn(DisasContext * dc)
1123 1123 gen_movl_T0_reg(rd);
1124 1124 break;
1125 1125 case 0x5: /* V9 rdpc */
1126   - gen_op_movl_T0_im(dc->pc);
  1126 + if (dc->pc == (uint32_t)dc->pc) {
  1127 + gen_op_movl_T0_im(dc->pc);
  1128 + } else {
  1129 + gen_op_movq_T0_im64(dc->pc >> 32, dc->pc);
  1130 + }
1127 1131 gen_movl_T0_reg(rd);
1128 1132 break;
1129 1133 case 0x6: /* V9 rdfprs */
... ... @@ -1765,6 +1769,11 @@ static void disas_sparc_insn(DisasContext * dc)
1765 1769 else
1766 1770 gen_op_addx_T1_T0();
1767 1771 break;
  1772 +#ifdef TARGET_SPARC64
  1773 + case 0x9: /* V9 mulx */
  1774 + gen_op_mulx_T1_T0();
  1775 + break;
  1776 +#endif
1768 1777 case 0xa:
1769 1778 gen_op_umul_T1_T0();
1770 1779 if (xop & 0x10)
... ... @@ -1781,6 +1790,11 @@ static void disas_sparc_insn(DisasContext * dc)
1781 1790 else
1782 1791 gen_op_subx_T1_T0();
1783 1792 break;
  1793 +#ifdef TARGET_SPARC64
  1794 + case 0xd: /* V9 udivx */
  1795 + gen_op_udivx_T1_T0();
  1796 + break;
  1797 +#endif
1784 1798 case 0xe:
1785 1799 gen_op_udiv_T1_T0();
1786 1800 if (xop & 0x10)
... ... @@ -1797,16 +1811,6 @@ static void disas_sparc_insn(DisasContext * dc)
1797 1811 gen_movl_T0_reg(rd);
1798 1812 } else {
1799 1813 switch (xop) {
1800   -#ifdef TARGET_SPARC64
1801   - case 0x9: /* V9 mulx */
1802   - gen_op_mulx_T1_T0();
1803   - gen_movl_T0_reg(rd);
1804   - break;
1805   - case 0xd: /* V9 udivx */
1806   - gen_op_udivx_T1_T0();
1807   - gen_movl_T0_reg(rd);
1808   - break;
1809   -#endif
1810 1814 case 0x20: /* taddcc */
1811 1815 case 0x21: /* tsubcc */
1812 1816 case 0x22: /* taddcctv */
... ... @@ -1942,6 +1946,11 @@ static void disas_sparc_insn(DisasContext * dc)
1942 1946 break;
1943 1947 case 6: // pstate
1944 1948 gen_op_wrpstate();
  1949 + save_state(dc);
  1950 + gen_op_next_insn();
  1951 + gen_op_movl_T0_0();
  1952 + gen_op_exit_tb();
  1953 + dc->is_br = 1;
1945 1954 break;
1946 1955 case 7: // tl
1947 1956 gen_op_movl_env_T0(offsetof(CPUSPARCState, tl));
... ... @@ -2121,7 +2130,15 @@ static void disas_sparc_insn(DisasContext * dc)
2121 2130 case 0x38: /* jmpl */
2122 2131 {
2123 2132 if (rd != 0) {
  2133 +#ifdef TARGET_SPARC64
  2134 + if (dc->pc == (uint32_t)dc->pc) {
  2135 + gen_op_movl_T1_im(dc->pc);
  2136 + } else {
  2137 + gen_op_movq_T1_im64(dc->pc >> 32, dc->pc);
  2138 + }
  2139 +#else
2124 2140 gen_op_movl_T1_im(dc->pc);
  2141 +#endif
2125 2142 gen_movl_T1_reg(rd);
2126 2143 }
2127 2144 gen_mov_pc_npc(dc);
... ... @@ -2721,11 +2738,19 @@ void cpu_dump_state(CPUState *env, FILE *f,
2721 2738 if ((i & 3) == 3)
2722 2739 cpu_fprintf(f, "\n");
2723 2740 }
  2741 +#ifdef TARGET_SPARC64
  2742 + cpu_fprintf(f, "pstate: 0x%08x ccr: 0x%02x asi: 0x%02x tl: %d\n",
  2743 + env->pstate, GET_CCR(env), env->asi, env->tl);
  2744 + cpu_fprintf(f, "cansave: %d canrestore: %d otherwin: %d wstate %d cleanwin %d cwp %d\n",
  2745 + env->cansave, env->canrestore, env->otherwin, env->wstate,
  2746 + env->cleanwin, NWINDOWS - 1 - env->cwp);
  2747 +#else
2724 2748 cpu_fprintf(f, "psr: 0x%08x -> %c%c%c%c %c%c%c wim: 0x%08x\n", GET_PSR(env),
2725 2749 GET_FLAG(PSR_ZERO, 'Z'), GET_FLAG(PSR_OVF, 'V'),
2726 2750 GET_FLAG(PSR_NEG, 'N'), GET_FLAG(PSR_CARRY, 'C'),
2727 2751 env->psrs?'S':'-', env->psrps?'P':'-',
2728 2752 env->psret?'E':'-', env->wim);
  2753 +#endif
2729 2754 cpu_fprintf(f, "fsr: 0x%08x\n", GET_FSR32(env));
2730 2755 }
2731 2756  
... ...