gwj / at91sam9263 · Commits

Commit dd4131b39492bd91dc87d216e761ca4cf210fb67

Authored by blueswir1
1 parent c4a7060c

Interrupt debugging DPRINTFs 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2881 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 22 additions and 10 deletions
hw/slavio_intctl.c
  View file @dd4131b
... ... @@ -71,18 +71,22 @@ static void slavio_check_interrupts(void *opaque);
71 71 static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr)
72 72 {
73 73 SLAVIO_INTCTLState *s = opaque;
74   - uint32_t saddr;
  74 + uint32_t saddr, ret;
75 75 int cpu;
76 76  
77 77 cpu = (addr & (MAX_CPUS - 1) * TARGET_PAGE_SIZE) >> 12;
78 78 saddr = (addr & INTCTL_MAXADDR) >> 2;
79 79 switch (saddr) {
80 80 case 0:
81   - return s->intreg_pending[cpu];
  81 + ret = s->intreg_pending[cpu];
  82 + break;
82 83 default:
83   - break;
  84 + ret = 0;
  85 + break;
84 86 }
85   - return 0;
  87 + DPRINTF("read cpu %d reg 0x%x = %x\n", addr, ret);
  88 +
  89 + return ret;
86 90 }
87 91  
88 92 static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
... ... @@ -93,6 +97,7 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint
93 97  
94 98 cpu = (addr & (MAX_CPUS - 1) * TARGET_PAGE_SIZE) >> 12;
95 99 saddr = (addr & INTCTL_MAXADDR) >> 2;
  100 + DPRINTF("write cpu %d reg 0x%x = %x\n", cpu, addr, val);
96 101 switch (saddr) {
97 102 case 1: // clear pending softints
98 103 if (val & 0x4000)
... ... @@ -128,20 +133,26 @@ static CPUWriteMemoryFunc *slavio_intctl_mem_write[3] = {
128 133 static uint32_t slavio_intctlm_mem_readl(void *opaque, target_phys_addr_t addr)
129 134 {
130 135 SLAVIO_INTCTLState *s = opaque;
131   - uint32_t saddr;
  136 + uint32_t saddr, ret;
132 137  
133 138 saddr = (addr & INTCTLM_MAXADDR) >> 2;
134 139 switch (saddr) {
135 140 case 0:
136   - return s->intregm_pending & 0x7fffffff;
  141 + ret = s->intregm_pending & 0x7fffffff;
  142 + break;
137 143 case 1:
138   - return s->intregm_disabled;
  144 + ret = s->intregm_disabled;
  145 + break;
139 146 case 4:
140   - return s->target_cpu;
  147 + ret = s->target_cpu;
  148 + break;
141 149 default:
142   - break;
  150 + ret = 0;
  151 + break;
143 152 }
144   - return 0;
  153 + DPRINTF("read system reg 0x%x = %x\n", addr, ret);
  154 +
  155 + return ret;
145 156 }
146 157  
147 158 static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
... ... @@ -150,6 +161,7 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin
150 161 uint32_t saddr;
151 162  
152 163 saddr = (addr & INTCTLM_MASK) >> 2;
  164 + DPRINTF("write system reg 0x%x = %x\n", addr, val);
153 165 switch (saddr) {
154 166 case 2: // clear (enable)
155 167 // Force clear unused bits
... ...