Commit dd016883fb560f0dc541d4da829caa33830fd30d
1 parent
d37aca66
add support for cvt.s.d and cvt.d.s (Aurelien Jarno)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2198 c046a42c-6fe2-441c-8c8c-71466251a162
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target-mips/op.c
@@ -785,12 +785,24 @@ void op_mtc1 (void) | @@ -785,12 +785,24 @@ void op_mtc1 (void) | ||
785 | 785 | ||
786 | #define FLOAT_OP(name, p) void OPPROTO op_float_##name##_##p(void) | 786 | #define FLOAT_OP(name, p) void OPPROTO op_float_##name##_##p(void) |
787 | 787 | ||
788 | +FLOAT_OP(cvtd, s) | ||
789 | +{ | ||
790 | + FDT2 = float32_to_float64(WT0, &env->fp_status); | ||
791 | + DEBUG_FPU_STATE(); | ||
792 | + RETURN(); | ||
793 | +} | ||
788 | FLOAT_OP(cvtd, w) | 794 | FLOAT_OP(cvtd, w) |
789 | { | 795 | { |
790 | FDT2 = int32_to_float64(WT0, &env->fp_status); | 796 | FDT2 = int32_to_float64(WT0, &env->fp_status); |
791 | DEBUG_FPU_STATE(); | 797 | DEBUG_FPU_STATE(); |
792 | RETURN(); | 798 | RETURN(); |
793 | } | 799 | } |
800 | +FLOAT_OP(cvts, d) | ||
801 | +{ | ||
802 | + FST2 = float64_to_float32(WT0, &env->fp_status); | ||
803 | + DEBUG_FPU_STATE(); | ||
804 | + RETURN(); | ||
805 | +} | ||
794 | FLOAT_OP(cvts, w) | 806 | FLOAT_OP(cvts, w) |
795 | { | 807 | { |
796 | FST2 = int32_to_float32(WT0, &env->fp_status); | 808 | FST2 = int32_to_float32(WT0, &env->fp_status); |
target-mips/translate.c
@@ -1675,6 +1675,13 @@ static void gen_farith (DisasContext *ctx, int fmt, int ft, int fs, int fd, int | @@ -1675,6 +1675,13 @@ static void gen_farith (DisasContext *ctx, int fmt, int ft, int fs, int fd, int | ||
1675 | GEN_STORE_FTN_FREG(fd, WT2); | 1675 | GEN_STORE_FTN_FREG(fd, WT2); |
1676 | opn = "ceil.w.d"; | 1676 | opn = "ceil.w.d"; |
1677 | break; | 1677 | break; |
1678 | + case FOP(33, 16): /* cvt.d.s */ | ||
1679 | + CHECK_FR(ctx, fs | fd); | ||
1680 | + GEN_LOAD_FREG_FTN(WT0, fs); | ||
1681 | + gen_op_float_cvtd_s(); | ||
1682 | + GEN_STORE_FTN_FREG(fd, DT2); | ||
1683 | + opn = "cvt.d.s"; | ||
1684 | + break; | ||
1678 | case FOP(33, 20): /* cvt.d.w */ | 1685 | case FOP(33, 20): /* cvt.d.w */ |
1679 | CHECK_FR(ctx, fs | fd); | 1686 | CHECK_FR(ctx, fs | fd); |
1680 | GEN_LOAD_FREG_FTN(WT0, fs); | 1687 | GEN_LOAD_FREG_FTN(WT0, fs); |
@@ -1782,6 +1789,13 @@ static void gen_farith (DisasContext *ctx, int fmt, int ft, int fs, int fd, int | @@ -1782,6 +1789,13 @@ static void gen_farith (DisasContext *ctx, int fmt, int ft, int fs, int fd, int | ||
1782 | GEN_STORE_FTN_FREG(fd, WT2); | 1789 | GEN_STORE_FTN_FREG(fd, WT2); |
1783 | opn = "trunc.w.s"; | 1790 | opn = "trunc.w.s"; |
1784 | break; | 1791 | break; |
1792 | + case FOP(32, 17): /* cvt.s.d */ | ||
1793 | + CHECK_FR(ctx, fs | fd); | ||
1794 | + GEN_LOAD_FREG_FTN(WT0, fs); | ||
1795 | + gen_op_float_cvts_d(); | ||
1796 | + GEN_STORE_FTN_FREG(fd, WT2); | ||
1797 | + opn = "cvt.s.d"; | ||
1798 | + break; | ||
1785 | case FOP(32, 20): /* cvt.s.w */ | 1799 | case FOP(32, 20): /* cvt.s.w */ |
1786 | CHECK_FR(ctx, fs | fd); | 1800 | CHECK_FR(ctx, fs | fd); |
1787 | GEN_LOAD_FREG_FTN(WT0, fs); | 1801 | GEN_LOAD_FREG_FTN(WT0, fs); |