Commit dcac9679febc944f79e82fb9970ad83154de22ac
1 parent
f78630ab
Use load_image_targphys and avoid phys_ram_base.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7056 c046a42c-6fe2-441c-8c8c-71466251a162
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16 changed files
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113 additions
and
71 deletions
hw/an5206.c
... | ... | @@ -72,8 +72,8 @@ static void an5206_init(ram_addr_t ram_size, int vga_ram_size, |
72 | 72 | kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL); |
73 | 73 | } |
74 | 74 | if (kernel_size < 0) { |
75 | - kernel_size = load_image(kernel_filename, | |
76 | - phys_ram_base + KERNEL_LOAD_ADDR); | |
75 | + kernel_size = load_image_targphys(kernel_filename, KERNEL_LOAD_ADDR, | |
76 | + ram_size - KERNEL_LOAD_ADDR); | |
77 | 77 | entry = KERNEL_LOAD_ADDR; |
78 | 78 | } |
79 | 79 | if (kernel_size < 0) { | ... | ... |
hw/armv7m.c
... | ... | @@ -170,16 +170,17 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, |
170 | 170 | #endif |
171 | 171 | |
172 | 172 | /* Flash programming is done via the SCU, so pretend it is ROM. */ |
173 | - cpu_register_physical_memory(0, flash_size, IO_MEM_ROM); | |
173 | + cpu_register_physical_memory(0, flash_size, | |
174 | + qemu_ram_alloc(flash_size) | IO_MEM_ROM); | |
174 | 175 | cpu_register_physical_memory(0x20000000, sram_size, |
175 | - flash_size + IO_MEM_RAM); | |
176 | + qemu_ram_alloc(sram_size) | IO_MEM_RAM); | |
176 | 177 | armv7m_bitband_init(); |
177 | 178 | |
178 | 179 | pic = armv7m_nvic_init(env); |
179 | 180 | |
180 | 181 | image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL); |
181 | 182 | if (image_size < 0) { |
182 | - image_size = load_image(kernel_filename, phys_ram_base); | |
183 | + image_size = load_image_targphys(kernel_filename, 0, flash_size); | |
183 | 184 | lowaddr = 0; |
184 | 185 | } |
185 | 186 | if (image_size < 0) { |
... | ... | @@ -203,7 +204,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, |
203 | 204 | /* Hack to map an additional page of ram at the top of the address |
204 | 205 | space. This stops qemu complaining about executing code outside RAM |
205 | 206 | when returning from an exception. */ |
206 | - cpu_register_physical_memory(0xfffff000, 0x1000, IO_MEM_RAM + ram_size); | |
207 | + cpu_register_physical_memory(0xfffff000, 0x1000, | |
208 | + qemu_ram_alloc(0x1000) | IO_MEM_RAM); | |
207 | 209 | |
208 | 210 | return pic; |
209 | 211 | } | ... | ... |
hw/axis_dev88.c
... | ... | @@ -338,7 +338,8 @@ void axisdev88_init (ram_addr_t ram_size, int vga_ram_size, |
338 | 338 | bootstrap_pc = entry; |
339 | 339 | if (kernel_size < 0) { |
340 | 340 | /* Takes a kimage from the axis devboard SDK. */ |
341 | - kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000); | |
341 | + kernel_size = load_image_targphys(kernel_filename, 0x40004000, | |
342 | + ram_size); | |
342 | 343 | bootstrap_pc = 0x40004000; |
343 | 344 | env->regs[9] = 0x40004000 + kernel_size; |
344 | 345 | } | ... | ... |
hw/dummy_m68k.c
... | ... | @@ -47,8 +47,9 @@ static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size, |
47 | 47 | kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL); |
48 | 48 | } |
49 | 49 | if (kernel_size < 0) { |
50 | - kernel_size = load_image(kernel_filename, | |
51 | - phys_ram_base + KERNEL_LOAD_ADDR); | |
50 | + kernel_size = load_image_targphys(kernel_filename, | |
51 | + KERNEL_LOAD_ADDR, | |
52 | + ram_size - KERNEL_LOAD_ADDR); | |
52 | 53 | entry = KERNEL_LOAD_ADDR; |
53 | 54 | } |
54 | 55 | if (kernel_size < 0) { | ... | ... |
hw/etraxfs.c
... | ... | @@ -129,7 +129,8 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size, |
129 | 129 | bootstrap_pc = entry; |
130 | 130 | if (kernel_size < 0) { |
131 | 131 | /* Takes a kimage from the axis devboard SDK. */ |
132 | - kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000); | |
132 | + kernel_size = load_image_targphys(kernel_filename, 0x40004000, | |
133 | + ram_size); | |
133 | 134 | bootstrap_pc = 0x40004000; |
134 | 135 | env->regs[9] = 0x40004000 + kernel_size; |
135 | 136 | } | ... | ... |
hw/mcf5208.c
... | ... | @@ -220,7 +220,7 @@ static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size, |
220 | 220 | env->vbr = 0; |
221 | 221 | /* TODO: Configure BARs. */ |
222 | 222 | |
223 | - /* DRAM at 0x20000000 */ | |
223 | + /* DRAM at 0x40000000 */ | |
224 | 224 | cpu_register_physical_memory(0x40000000, ram_size, |
225 | 225 | qemu_ram_alloc(ram_size) | IO_MEM_RAM); |
226 | 226 | |
... | ... | @@ -278,8 +278,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size, |
278 | 278 | kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL); |
279 | 279 | } |
280 | 280 | if (kernel_size < 0) { |
281 | - kernel_size = load_image(kernel_filename, phys_ram_base); | |
282 | - entry = 0x20000000; | |
281 | + kernel_size = load_image_targphys(kernel_filename, 0x40000000, | |
282 | + ram_size); | |
283 | + entry = 0x40000000; | |
283 | 284 | } |
284 | 285 | if (kernel_size < 0) { |
285 | 286 | fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); | ... | ... |
hw/mips_jazz.c
... | ... | @@ -129,7 +129,6 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, |
129 | 129 | enum jazz_model_e jazz_model) |
130 | 130 | { |
131 | 131 | char buf[1024]; |
132 | - unsigned long bios_offset; | |
133 | 132 | int bios_size, n; |
134 | 133 | CPUState *env; |
135 | 134 | qemu_irq *rc4030, *i8259; |
... | ... | @@ -141,6 +140,9 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, |
141 | 140 | PITState *pit; |
142 | 141 | BlockDriverState *fds[MAX_FD]; |
143 | 142 | qemu_irq esp_reset; |
143 | + ram_addr_t ram_offset; | |
144 | + ram_addr_t bios_offset; | |
145 | + ram_addr_t vga_ram_offset; | |
144 | 146 | |
145 | 147 | /* init CPUs */ |
146 | 148 | if (cpu_model == NULL) { |
... | ... | @@ -159,25 +161,27 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, |
159 | 161 | qemu_register_reset(main_cpu_reset, env); |
160 | 162 | |
161 | 163 | /* allocate RAM */ |
162 | - cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); | |
164 | + ram_offset = qemu_ram_alloc(ram_size); | |
165 | + cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); | |
166 | + | |
167 | + vga_ram_offset = qemu_ram_alloc(vga_ram_size); | |
168 | + bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE); | |
169 | + cpu_register_physical_memory(0x1fc00000LL, | |
170 | + MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM); | |
171 | + cpu_register_physical_memory(0xfff00000LL, | |
172 | + MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM); | |
163 | 173 | |
164 | 174 | /* load the BIOS image. */ |
165 | - bios_offset = ram_size + vga_ram_size; | |
166 | 175 | if (bios_name == NULL) |
167 | 176 | bios_name = BIOS_FILENAME; |
168 | 177 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
169 | - bios_size = load_image(buf, phys_ram_base + bios_offset); | |
178 | + bios_size = load_image_targphys(buf, 0xfff00000LL, MAGNUM_BIOS_SIZE); | |
170 | 179 | if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) { |
171 | 180 | fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", |
172 | 181 | buf); |
173 | 182 | exit(1); |
174 | 183 | } |
175 | 184 | |
176 | - cpu_register_physical_memory(0x1fc00000LL, | |
177 | - MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM); | |
178 | - cpu_register_physical_memory(0xfff00000LL, | |
179 | - MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM); | |
180 | - | |
181 | 185 | /* Init CPU internal devices */ |
182 | 186 | cpu_mips_irq_init_cpu(env); |
183 | 187 | cpu_mips_clock_init(env); |
... | ... | @@ -201,11 +205,11 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, |
201 | 205 | /* Video card */ |
202 | 206 | switch (jazz_model) { |
203 | 207 | case JAZZ_MAGNUM: |
204 | - g364fb_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size, | |
208 | + g364fb_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size, | |
205 | 209 | 0x40000000, 0x60000000, 0, rc4030[3]); |
206 | 210 | break; |
207 | 211 | case JAZZ_PICA61: |
208 | - isa_vga_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size, | |
212 | + isa_vga_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size, | |
209 | 213 | 0x40000000, 0x60000000, 0); |
210 | 214 | break; |
211 | 215 | default: | ... | ... |
hw/mips_malta.c
... | ... | @@ -717,8 +717,9 @@ static int64_t load_kernel (CPUState *env) |
717 | 717 | loaderparams.initrd_filename); |
718 | 718 | exit(1); |
719 | 719 | } |
720 | - initrd_size = load_image(loaderparams.initrd_filename, | |
721 | - phys_ram_base + initrd_offset); | |
720 | + initrd_size = load_image_targphys(loaderparams.initrd_filename, | |
721 | + initrd_offset, | |
722 | + ram_size - initrd_offset); | |
722 | 723 | } |
723 | 724 | if (initrd_size == (target_ulong) -1) { |
724 | 725 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", |
... | ... | @@ -767,7 +768,9 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, |
767 | 768 | const char *initrd_filename, const char *cpu_model) |
768 | 769 | { |
769 | 770 | char buf[1024]; |
770 | - unsigned long bios_offset; | |
771 | + ram_addr_t ram_offset; | |
772 | + ram_addr_t vga_ram_offset; | |
773 | + ram_addr_t bios_offset; | |
771 | 774 | target_long bios_size; |
772 | 775 | int64_t kernel_entry; |
773 | 776 | PCIBus *pci_bus; |
... | ... | @@ -808,10 +811,14 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, |
808 | 811 | ((unsigned int)ram_size / (1 << 20))); |
809 | 812 | exit(1); |
810 | 813 | } |
811 | - cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); | |
814 | + ram_offset = qemu_ram_alloc(ram_size); | |
815 | + vga_ram_offset = qemu_ram_alloc(vga_ram_size); | |
816 | + bios_offset = qemu_ram_alloc(BIOS_SIZE); | |
817 | + | |
818 | + | |
819 | + cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); | |
812 | 820 | |
813 | 821 | /* Map the bios at two physical locations, as on the real board. */ |
814 | - bios_offset = ram_size + vga_ram_size; | |
815 | 822 | cpu_register_physical_memory(0x1e000000LL, |
816 | 823 | BIOS_SIZE, bios_offset | IO_MEM_ROM); |
817 | 824 | cpu_register_physical_memory(0x1fc00000LL, |
... | ... | @@ -851,7 +858,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, |
851 | 858 | if (bios_name == NULL) |
852 | 859 | bios_name = BIOS_FILENAME; |
853 | 860 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
854 | - bios_size = load_image(buf, phys_ram_base + bios_offset); | |
861 | + bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE); | |
855 | 862 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { |
856 | 863 | fprintf(stderr, |
857 | 864 | "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n", |
... | ... | @@ -942,13 +949,13 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, |
942 | 949 | |
943 | 950 | /* Optional PCI video card */ |
944 | 951 | if (cirrus_vga_enabled) { |
945 | - pci_cirrus_vga_init(pci_bus, phys_ram_base + ram_size, | |
952 | + pci_cirrus_vga_init(pci_bus, phys_ram_base + vga_ram_offset, | |
946 | 953 | ram_size, vga_ram_size); |
947 | 954 | } else if (vmsvga_enabled) { |
948 | - pci_vmsvga_init(pci_bus, phys_ram_base + ram_size, | |
955 | + pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_offset, | |
949 | 956 | ram_size, vga_ram_size); |
950 | 957 | } else if (std_vga_enabled) { |
951 | - pci_vga_init(pci_bus, phys_ram_base + ram_size, | |
958 | + pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset, | |
952 | 959 | ram_size, vga_ram_size, 0, 0); |
953 | 960 | } |
954 | 961 | } | ... | ... |
hw/mips_mipssim.c
... | ... | @@ -86,8 +86,8 @@ static void load_kernel (CPUState *env) |
86 | 86 | loaderparams.initrd_filename); |
87 | 87 | exit(1); |
88 | 88 | } |
89 | - initrd_size = load_image(loaderparams.initrd_filename, | |
90 | - phys_ram_base + initrd_offset); | |
89 | + initrd_size = load_image_targphys(loaderparams.initrd_filename, | |
90 | + initrd_offset, loaderparams.ram_size - initrd_offset); | |
91 | 91 | } |
92 | 92 | if (initrd_size == (target_ulong) -1) { |
93 | 93 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", |
... | ... | @@ -113,7 +113,8 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size, |
113 | 113 | const char *initrd_filename, const char *cpu_model) |
114 | 114 | { |
115 | 115 | char buf[1024]; |
116 | - unsigned long bios_offset; | |
116 | + ram_addr_t ram_offset; | |
117 | + ram_addr_t bios_offset; | |
117 | 118 | CPUState *env; |
118 | 119 | int bios_size; |
119 | 120 | |
... | ... | @@ -133,14 +134,19 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size, |
133 | 134 | qemu_register_reset(main_cpu_reset, env); |
134 | 135 | |
135 | 136 | /* Allocate RAM. */ |
136 | - cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); | |
137 | + ram_offset = qemu_ram_alloc(ram_size); | |
138 | + bios_offset = qemu_ram_alloc(BIOS_SIZE); | |
137 | 139 | |
140 | + cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); | |
141 | + | |
142 | + /* Map the BIOS / boot exception handler. */ | |
143 | + cpu_register_physical_memory(0x1fc00000LL, | |
144 | + BIOS_SIZE, bios_offset | IO_MEM_ROM); | |
138 | 145 | /* Load a BIOS / boot exception handler image. */ |
139 | - bios_offset = ram_size + vga_ram_size; | |
140 | 146 | if (bios_name == NULL) |
141 | 147 | bios_name = BIOS_FILENAME; |
142 | 148 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
143 | - bios_size = load_image(buf, phys_ram_base + bios_offset); | |
149 | + bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE); | |
144 | 150 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { |
145 | 151 | /* Bail out if we have neither a kernel image nor boot vector code. */ |
146 | 152 | fprintf(stderr, |
... | ... | @@ -148,9 +154,6 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size, |
148 | 154 | buf); |
149 | 155 | exit(1); |
150 | 156 | } else { |
151 | - /* Map the BIOS / boot exception handler. */ | |
152 | - cpu_register_physical_memory(0x1fc00000LL, | |
153 | - bios_size, bios_offset | IO_MEM_ROM); | |
154 | 157 | /* We have a boot vector start address. */ |
155 | 158 | env->active_tc.PC = (target_long)(int32_t)0xbfc00000; |
156 | 159 | } | ... | ... |
hw/mips_r4k.c
... | ... | @@ -107,8 +107,9 @@ static void load_kernel (CPUState *env) |
107 | 107 | loaderparams.initrd_filename); |
108 | 108 | exit(1); |
109 | 109 | } |
110 | - initrd_size = load_image(loaderparams.initrd_filename, | |
111 | - phys_ram_base + initrd_offset); | |
110 | + initrd_size = load_image_targphys(loaderparams.initrd_filename, | |
111 | + initrd_offset, | |
112 | + ram_size - initrd_offset); | |
112 | 113 | } |
113 | 114 | if (initrd_size == (target_ulong) -1) { |
114 | 115 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", |
... | ... | @@ -153,7 +154,9 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, |
153 | 154 | const char *initrd_filename, const char *cpu_model) |
154 | 155 | { |
155 | 156 | char buf[1024]; |
156 | - unsigned long bios_offset; | |
157 | + ram_addr_t ram_offset; | |
158 | + ram_addr_t vga_ram_offset; | |
159 | + ram_addr_t bios_offset; | |
157 | 160 | int bios_size; |
158 | 161 | CPUState *env; |
159 | 162 | RTCState *rtc_state; |
... | ... | @@ -184,7 +187,10 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, |
184 | 187 | ((unsigned int)ram_size / (1 << 20))); |
185 | 188 | exit(1); |
186 | 189 | } |
187 | - cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); | |
190 | + ram_offset = qemu_ram_alloc(ram_size); | |
191 | + vga_ram_offset = qemu_ram_alloc(vga_ram_size); | |
192 | + | |
193 | + cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); | |
188 | 194 | |
189 | 195 | if (!mips_qemu_iomemtype) { |
190 | 196 | mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read, |
... | ... | @@ -196,19 +202,20 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, |
196 | 202 | but initialize the hardware ourselves. When a kernel gets |
197 | 203 | preloaded we also initialize the hardware, since the BIOS wasn't |
198 | 204 | run. */ |
199 | - bios_offset = ram_size + vga_ram_size; | |
200 | 205 | if (bios_name == NULL) |
201 | 206 | bios_name = BIOS_FILENAME; |
202 | 207 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
203 | - bios_size = load_image(buf, phys_ram_base + bios_offset); | |
208 | + bios_size = get_image_size(buf); | |
204 | 209 | if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { |
205 | - cpu_register_physical_memory(0x1fc00000, | |
206 | - BIOS_SIZE, bios_offset | IO_MEM_ROM); | |
210 | + bios_offset = qemu_ram_alloc(BIOS_SIZE); | |
211 | + cpu_register_physical_memory(0x1fc00000, BIOS_SIZE, | |
212 | + bios_offset | IO_MEM_ROM); | |
213 | + | |
214 | + load_image_targphys(buf, 0x1fc00000, BIOS_SIZE); | |
207 | 215 | } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) { |
208 | 216 | uint32_t mips_rom = 0x00400000; |
209 | - cpu_register_physical_memory(0x1fc00000, mips_rom, | |
210 | - qemu_ram_alloc(mips_rom) | IO_MEM_ROM); | |
211 | - if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom), | |
217 | + bios_offset = qemu_ram_alloc(mips_rom); | |
218 | + if (!pflash_cfi01_register(0x1fc00000, bios_offset, | |
212 | 219 | drives_table[index].bdrv, sector_len, mips_rom / sector_len, |
213 | 220 | 4, 0, 0, 0, 0)) { |
214 | 221 | fprintf(stderr, "qemu: Error registering flash memory.\n"); |
... | ... | @@ -250,7 +257,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, |
250 | 257 | } |
251 | 258 | } |
252 | 259 | |
253 | - isa_vga_init(phys_ram_base + ram_size, ram_size, | |
260 | + isa_vga_init(phys_ram_base + vga_ram_offset, ram_size, | |
254 | 261 | vga_ram_size); |
255 | 262 | |
256 | 263 | if (nd_table[0].vlan) | ... | ... |
hw/nseries.c
... | ... | @@ -1341,6 +1341,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device, |
1341 | 1341 | } |
1342 | 1342 | |
1343 | 1343 | if (option_rom[0] && (boot_device[0] == 'n' || !kernel_filename)) { |
1344 | + int rom_size; | |
1344 | 1345 | /* No, wait, better start at the ROM. */ |
1345 | 1346 | s->cpu->env->regs[15] = OMAP2_Q2_BASE + 0x400000; |
1346 | 1347 | |
... | ... | @@ -1353,8 +1354,10 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device, |
1353 | 1354 | * |
1354 | 1355 | * The code above is for loading the `zImage' file from Nokia |
1355 | 1356 | * images. */ |
1356 | - printf("%i bytes of image loaded\n", load_image(option_rom[0], | |
1357 | - phys_ram_base + 0x400000)); | |
1357 | + rom_size = load_image_targphys(option_rom[0], | |
1358 | + OMAP2_Q2_BASE + 0x400000, | |
1359 | + sdram_size - 0x400000); | |
1360 | + printf("%i bytes of image loaded\n", rom_size); | |
1358 | 1361 | |
1359 | 1362 | n800_setup_nolo_tags(phys_ram_base + sdram_size); |
1360 | 1363 | } | ... | ... |
hw/palm.c
... | ... | @@ -247,16 +247,21 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size, |
247 | 247 | /* Setup initial (reset) machine state */ |
248 | 248 | if (nb_option_roms) { |
249 | 249 | rom_size = get_image_size(option_rom[0]); |
250 | - if (rom_size > flash_size) | |
250 | + if (rom_size > flash_size) { | |
251 | 251 | fprintf(stderr, "%s: ROM image too big (%x > %x)\n", |
252 | 252 | __FUNCTION__, rom_size, flash_size); |
253 | - else if (rom_size > 0 && load_image(option_rom[0], | |
254 | - phys_ram_base + phys_flash) > 0) { | |
253 | + rom_size = 0; | |
254 | + } | |
255 | + if (rom_size > 0) { | |
256 | + rom_size = load_image_targphys(option_rom[0], OMAP_CS0_BASE, | |
257 | + flash_size); | |
255 | 258 | rom_loaded = 1; |
256 | 259 | cpu->env->regs[15] = 0x00000000; |
257 | - } else | |
260 | + } | |
261 | + if (rom_size < 0) { | |
258 | 262 | fprintf(stderr, "%s: error loading '%s'\n", |
259 | 263 | __FUNCTION__, option_rom[0]); |
264 | + } | |
260 | 265 | } |
261 | 266 | |
262 | 267 | if (!rom_loaded && !kernel_filename) { | ... | ... |
hw/ppc440_bamboo.c
... | ... | @@ -148,7 +148,8 @@ static void bamboo_init(ram_addr_t ram_size, int vga_ram_size, |
148 | 148 | /* Load initrd. */ |
149 | 149 | if (initrd_filename) { |
150 | 150 | initrd_base = kernel_size + loadaddr; |
151 | - initrd_size = load_image(initrd_filename, phys_ram_base + initrd_base); | |
151 | + initrd_size = load_image_targphys(initrd_filename, initrd_base, | |
152 | + ram_size - initrd_base); | |
152 | 153 | |
153 | 154 | if (initrd_size < 0) { |
154 | 155 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | ... | ... |
hw/ppc_oldworld.c
... | ... | @@ -231,8 +231,8 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, |
231 | 231 | /* load initrd */ |
232 | 232 | if (initrd_filename) { |
233 | 233 | initrd_base = INITRD_LOAD_ADDR; |
234 | - initrd_size = load_image(initrd_filename, | |
235 | - phys_ram_base + initrd_base); | |
234 | + initrd_size = load_image_targphys(initrd_filename, initrd_base, | |
235 | + ram_size - initrd_base); | |
236 | 236 | if (initrd_size < 0) { |
237 | 237 | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n", |
238 | 238 | initrd_filename); | ... | ... |
hw/ppc_prep.c
... | ... | @@ -588,7 +588,15 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, |
588 | 588 | if (bios_name == NULL) |
589 | 589 | bios_name = BIOS_FILENAME; |
590 | 590 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
591 | - bios_size = load_image(buf, phys_ram_base + bios_offset); | |
591 | + bios_size = get_image_size(buf); | |
592 | + if (bios_size > 0 && bios_size <= BIOS_SIZE) { | |
593 | + target_phys_addr_t bios_addr; | |
594 | + bios_size = (bios_size + 0xfff) & ~0xfff; | |
595 | + bios_addr = (uint32_t)(-bios_size); | |
596 | + cpu_register_physical_memory(bios_addr, bios_size, | |
597 | + bios_offset | IO_MEM_ROM); | |
598 | + bios_size = load_image_targphys(buf, bios_addr, bios_size); | |
599 | + } | |
592 | 600 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
593 | 601 | cpu_abort(env, "qemu: could not load PPC PREP bios '%s'\n", buf); |
594 | 602 | exit(1); |
... | ... | @@ -596,14 +604,12 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, |
596 | 604 | if (env->nip < 0xFFF80000 && bios_size < 0x00100000) { |
597 | 605 | cpu_abort(env, "PowerPC 601 / 620 / 970 need a 1MB BIOS\n"); |
598 | 606 | } |
599 | - bios_size = (bios_size + 0xfff) & ~0xfff; | |
600 | - cpu_register_physical_memory((uint32_t)(-bios_size), | |
601 | - bios_size, bios_offset | IO_MEM_ROM); | |
602 | 607 | |
603 | 608 | if (linux_boot) { |
604 | 609 | kernel_base = KERNEL_LOAD_ADDR; |
605 | 610 | /* now we can load the kernel */ |
606 | - kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base); | |
611 | + kernel_size = load_image_targphys(kernel_filename, kernel_base, | |
612 | + ram_size - kernel_base); | |
607 | 613 | if (kernel_size < 0) { |
608 | 614 | cpu_abort(env, "qemu: could not load kernel '%s'\n", |
609 | 615 | kernel_filename); |
... | ... | @@ -612,8 +618,8 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, |
612 | 618 | /* load initrd */ |
613 | 619 | if (initrd_filename) { |
614 | 620 | initrd_base = INITRD_LOAD_ADDR; |
615 | - initrd_size = load_image(initrd_filename, | |
616 | - phys_ram_base + initrd_base); | |
621 | + initrd_size = load_image_targphys(initrd_filename, initrd_base, | |
622 | + ram_size - initrd_base); | |
617 | 623 | if (initrd_size < 0) { |
618 | 624 | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n", |
619 | 625 | initrd_filename); | ... | ... |
hw/shix.c
... | ... | @@ -73,7 +73,7 @@ static void shix_init(ram_addr_t ram_size, int vga_ram_size, |
73 | 73 | if (bios_name == NULL) |
74 | 74 | bios_name = BIOS_FILENAME; |
75 | 75 | printf("%s: load BIOS '%s'\n", __func__, bios_name); |
76 | - ret = load_image(bios_name, phys_ram_base); | |
76 | + ret = load_image_targphys(bios_name, 0, 0x4000); | |
77 | 77 | if (ret < 0) { /* Check bios size */ |
78 | 78 | fprintf(stderr, "ret=%d\n", ret); |
79 | 79 | fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", | ... | ... |