Commit db4a4ea4eee11c41aae835012ddd9559a055f4ce
1 parent
902b27d0
Use a TCG global for regwptr
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4038 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
1 changed file
with
3 additions
and
3 deletions
target-sparc/translate.c
... | ... | @@ -221,7 +221,6 @@ static inline void gen_movl_reg_TN(int reg, TCGv tn) |
221 | 221 | else if (reg < 8) |
222 | 222 | tcg_gen_ld_tl(tn, cpu_env, offsetof(CPUState, gregs[reg])); |
223 | 223 | else { |
224 | - tcg_gen_ld_ptr(cpu_regwptr, cpu_env, offsetof(CPUState, regwptr)); // XXX | |
225 | 224 | tcg_gen_ld_tl(tn, cpu_regwptr, (reg - 8) * sizeof(target_ulong)); |
226 | 225 | } |
227 | 226 | } |
... | ... | @@ -250,7 +249,6 @@ static inline void gen_movl_TN_reg(int reg, TCGv tn) |
250 | 249 | else if (reg < 8) |
251 | 250 | tcg_gen_st_tl(tn, cpu_env, offsetof(CPUState, gregs[reg])); |
252 | 251 | else { |
253 | - tcg_gen_ld_ptr(cpu_regwptr, cpu_env, offsetof(CPUState, regwptr)); // XXX | |
254 | 252 | tcg_gen_st_tl(tn, cpu_regwptr, (reg - 8) * sizeof(target_ulong)); |
255 | 253 | } |
256 | 254 | } |
... | ... | @@ -4172,7 +4170,6 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, |
4172 | 4170 | gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; |
4173 | 4171 | |
4174 | 4172 | cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL); |
4175 | - cpu_regwptr = tcg_temp_new(TCG_TYPE_PTR); // XXX | |
4176 | 4173 | |
4177 | 4174 | do { |
4178 | 4175 | if (env->nb_breakpoints > 0) { |
... | ... | @@ -4337,6 +4334,9 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) |
4337 | 4334 | |
4338 | 4335 | tcg_set_macro_func(&tcg_ctx, tcg_macro_func); |
4339 | 4336 | cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env"); |
4337 | + cpu_regwptr = tcg_global_mem_new(TCG_TYPE_PTR, TCG_AREG0, | |
4338 | + offsetof(CPUState, regwptr), | |
4339 | + "regwptr"); | |
4340 | 4340 | //#if TARGET_LONG_BITS > HOST_LONG_BITS |
4341 | 4341 | #ifdef TARGET_SPARC64 |
4342 | 4342 | cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL, | ... | ... |