Commit dac454af57c6389c2e3df0b8b51a9b35429d8caa

Authored by j_mayer
1 parent c7697e1f

Bugfix in PowerPC dcbi instruction:

we must do a load before the store, or we'll store random data.
Update cache instructions comments.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3448 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 2 additions and 5 deletions
target-ppc/translate.c
@@ -3618,13 +3618,10 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC) @@ -3618,13 +3618,10 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC)
3618 } 3618 }
3619 3619
3620 /*** Cache management ***/ 3620 /*** Cache management ***/
3621 -/* For now, all those will be implemented as nop:  
3622 - * this is valid, regarding the PowerPC specs...  
3623 - * We just have to flush tb while invalidating instruction cache lines...  
3624 - */  
3625 /* dcbf */ 3621 /* dcbf */
3626 GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE) 3622 GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE)
3627 { 3623 {
  3624 + /* XXX: specification says this is treated as a load by the MMU */
3628 gen_addr_reg_index(ctx); 3625 gen_addr_reg_index(ctx);
3629 op_ldst(lbz); 3626 op_ldst(lbz);
3630 } 3627 }
@@ -3641,7 +3638,7 @@ GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE) @@ -3641,7 +3638,7 @@ GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE)
3641 } 3638 }
3642 gen_addr_reg_index(ctx); 3639 gen_addr_reg_index(ctx);
3643 /* XXX: specification says this should be treated as a store by the MMU */ 3640 /* XXX: specification says this should be treated as a store by the MMU */
3644 - //op_ldst(lbz); 3641 + op_ldst(lbz);
3645 op_ldst(stb); 3642 op_ldst(stb);
3646 #endif 3643 #endif
3647 } 3644 }