gwj / at91sam9263 · Commits

Commit d987963aa9769be66226456f08f99306d25cfd4f

Authored by blueswir1
1 parent 3f0436fe

Eliminate cpu_T[0] 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 9 additions and 9 deletions
target-sparc/translate.c
  View file @d987963
@@ -38,7 +38,7 @@ @@ -38,7 +38,7 @@
38 according to jump_pc[T2] */ 38 according to jump_pc[T2] */
39 39
40 /* global register indexes */ 40 /* global register indexes */
41 -static TCGv cpu_env, cpu_T[2], cpu_regwptr; 41 +static TCGv cpu_env, cpu_regwptr;
42 static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst; 42 static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst;
43 static TCGv cpu_psr, cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8]; 43 static TCGv cpu_psr, cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8];
44 static TCGv cpu_cond, cpu_src1, cpu_src2, cpu_dst, cpu_addr, cpu_val; 44 static TCGv cpu_cond, cpu_src1, cpu_src2, cpu_dst, cpu_addr, cpu_val;
@@ -1912,13 +1912,9 @@ static void disas_sparc_insn(DisasContext * dc) @@ -1912,13 +1912,9 @@ static void disas_sparc_insn(DisasContext * dc)
1912 1912
1913 rd = GET_FIELD(insn, 2, 6); 1913 rd = GET_FIELD(insn, 2, 6);
1914 1914
1915 - cpu_dst = cpu_T[0];  
1916 cpu_src1 = tcg_temp_new(TCG_TYPE_TL); // const 1915 cpu_src1 = tcg_temp_new(TCG_TYPE_TL); // const
1917 cpu_src2 = tcg_temp_new(TCG_TYPE_TL); // const 1916 cpu_src2 = tcg_temp_new(TCG_TYPE_TL); // const
1918 1917
1919 - // loads and stores  
1920 - cpu_addr = cpu_T[0];  
1921 -  
1922 switch (opc) { 1918 switch (opc) {
1923 case 0: /* branches/sethi */ 1919 case 0: /* branches/sethi */
1924 { 1920 {
@@ -4220,7 +4216,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -4220,7 +4216,7 @@ static void disas_sparc_insn(DisasContext * dc)
4220 4216
4221 save_state(dc, cpu_cond); 4217 save_state(dc, cpu_cond);
4222 r_const = tcg_const_i32(7); 4218 r_const = tcg_const_i32(7);
4223 - tcg_gen_helper_0_2(helper_check_align, cpu_dst, 4219 + tcg_gen_helper_0_2(helper_check_align, cpu_addr,
4224 r_const); // XXX remove 4220 r_const); // XXX remove
4225 tcg_temp_free(r_const); 4221 tcg_temp_free(r_const);
4226 ABI32_MASK(cpu_addr); 4222 ABI32_MASK(cpu_addr);
@@ -4744,7 +4740,12 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, @@ -4744,7 +4740,12 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
4744 cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL); 4740 cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL);
4745 cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32); 4741 cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32);
4746 cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64); 4742 cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64);
  4743 +
  4744 + cpu_dst = tcg_temp_local_new(TCG_TYPE_TL);
  4745 +
  4746 + // loads and stores
4747 cpu_val = tcg_temp_local_new(TCG_TYPE_TL); 4747 cpu_val = tcg_temp_local_new(TCG_TYPE_TL);
  4748 + cpu_addr = tcg_temp_local_new(TCG_TYPE_TL);
4748 4749
4749 do { 4750 do {
4750 if (env->nb_breakpoints > 0) { 4751 if (env->nb_breakpoints > 0) {
@@ -4795,7 +4796,9 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, @@ -4795,7 +4796,9 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
4795 (dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32)); 4796 (dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32));
4796 4797
4797 exit_gen_loop: 4798 exit_gen_loop:
  4799 + tcg_temp_free(cpu_addr);
4798 tcg_temp_free(cpu_val); 4800 tcg_temp_free(cpu_val);
  4801 + tcg_temp_free(cpu_dst);
4799 tcg_temp_free(cpu_tmp64); 4802 tcg_temp_free(cpu_tmp64);
4800 tcg_temp_free(cpu_tmp32); 4803 tcg_temp_free(cpu_tmp32);
4801 tcg_temp_free(cpu_tmp0); 4804 tcg_temp_free(cpu_tmp0);
@@ -4876,9 +4879,6 @@ void gen_intermediate_code_init(CPUSPARCState *env) @@ -4876,9 +4879,6 @@ void gen_intermediate_code_init(CPUSPARCState *env)
4876 TCG_AREG0, offsetof(CPUState, xcc), 4879 TCG_AREG0, offsetof(CPUState, xcc),
4877 "xcc"); 4880 "xcc");
4878 #endif 4881 #endif
4879 - /* XXX: T0 should be a temporary */  
4880 - cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,  
4881 - TCG_AREG0, offsetof(CPUState, t0), "T0");  
4882 cpu_cond = tcg_global_mem_new(TCG_TYPE_TL, 4882 cpu_cond = tcg_global_mem_new(TCG_TYPE_TL,
4883 TCG_AREG0, offsetof(CPUState, cond), 4883 TCG_AREG0, offsetof(CPUState, cond),
4884 "cond"); 4884 "cond");