Commit d6929309b689264755963fe5ee18767a7f1c4af5

Authored by ths
1 parent 7bc45061

Next attempt to get the lui sign extension right.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips/op_template.c
@@ -54,7 +54,7 @@ void glue(op_load_gpr_T2_gpr, REG) (void) @@ -54,7 +54,7 @@ void glue(op_load_gpr_T2_gpr, REG) (void)
54 #define SET_RESET(treg, tregname) \ 54 #define SET_RESET(treg, tregname) \
55 void glue(op_set, tregname)(void) \ 55 void glue(op_set, tregname)(void) \
56 { \ 56 { \
57 - treg = PARAM1; \ 57 + treg = (int32_t)PARAM1; \
58 RETURN(); \ 58 RETURN(); \
59 } \ 59 } \
60 void glue(op_reset, tregname)(void) \ 60 void glue(op_reset, tregname)(void) \
target-mips/translate.c
@@ -907,8 +907,7 @@ static void gen_arith_imm (DisasContext *ctx, uint32_t opc, int rt, @@ -907,8 +907,7 @@ static void gen_arith_imm (DisasContext *ctx, uint32_t opc, int rt,
907 GEN_LOAD_IMM_TN(T1, uimm); 907 GEN_LOAD_IMM_TN(T1, uimm);
908 break; 908 break;
909 case OPC_LUI: 909 case OPC_LUI:
910 - uimm = (int32_t)(imm << 16);  
911 - GEN_LOAD_IMM_TN(T0, uimm); 910 + GEN_LOAD_IMM_TN(T0, uimm << 16);
912 break; 911 break;
913 case OPC_SLL: 912 case OPC_SLL:
914 case OPC_SRA: 913 case OPC_SRA: