gwj / at91sam9263 · Commits

Commit d5853c20f2bd7c4551fcb99b4d1a188c25ffd140

Authored by aurel32
1 parent 1f605a76

Add load/save capability to rc4030 chipset 

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6558 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 65 additions and 0 deletions
hw/rc4030.c
  View file @d5853c2
@@ -602,6 +602,70 @@ static void rc4030_reset(void *opaque) @@ -602,6 +602,70 @@ static void rc4030_reset(void *opaque)
602 qemu_irq_lower(s->jazz_bus_irq); 602 qemu_irq_lower(s->jazz_bus_irq);
603 } 603 }
604 604
  605 +static int rc4030_load(QEMUFile *f, void *opaque, int version_id)
  606 +{
  607 + rc4030State* s = opaque;
  608 + int i, j;
  609 +
  610 + if (version_id != 1)
  611 + return -EINVAL;
  612 +
  613 + s->config = qemu_get_be32(f);
  614 + s->invalid_address_register = qemu_get_be32(f);
  615 + for (i = 0; i < 8; i++)
  616 + for (j = 0; j < 4; j++)
  617 + s->dma_regs[i][j] = qemu_get_be32(f);
  618 + s->dma_tl_base = qemu_get_be32(f);
  619 + s->dma_tl_limit = qemu_get_be32(f);
  620 + s->remote_failed_address = qemu_get_be32(f);
  621 + s->memory_failed_address = qemu_get_be32(f);
  622 + s->cache_ptag = qemu_get_be32(f);
  623 + s->cache_ltag = qemu_get_be32(f);
  624 + s->cache_bmask = qemu_get_be32(f);
  625 + s->cache_bwin = qemu_get_be32(f);
  626 + s->offset210 = qemu_get_be32(f);
  627 + s->nvram_protect = qemu_get_be32(f);
  628 + s->offset238 = qemu_get_be32(f);
  629 + for (i = 0; i < 15; i++)
  630 + s->rem_speed[i] = qemu_get_be32(f);
  631 + s->imr_jazz = qemu_get_be32(f);
  632 + s->isr_jazz = qemu_get_be32(f);
  633 + s->itr = qemu_get_be32(f);
  634 +
  635 + set_next_tick(s);
  636 + update_jazz_irq(s);
  637 +
  638 + return 0;
  639 +}
  640 +
  641 +static void rc4030_save(QEMUFile *f, void *opaque)
  642 +{
  643 + rc4030State* s = opaque;
  644 + int i, j;
  645 +
  646 + qemu_put_be32(f, s->config);
  647 + qemu_put_be32(f, s->invalid_address_register);
  648 + for (i = 0; i < 8; i++)
  649 + for (j = 0; j < 4; j++)
  650 + qemu_put_be32(f, s->dma_regs[i][j]);
  651 + qemu_put_be32(f, s->dma_tl_base);
  652 + qemu_put_be32(f, s->dma_tl_limit);
  653 + qemu_put_be32(f, s->remote_failed_address);
  654 + qemu_put_be32(f, s->memory_failed_address);
  655 + qemu_put_be32(f, s->cache_ptag);
  656 + qemu_put_be32(f, s->cache_ltag);
  657 + qemu_put_be32(f, s->cache_bmask);
  658 + qemu_put_be32(f, s->cache_bwin);
  659 + qemu_put_be32(f, s->offset210);
  660 + qemu_put_be32(f, s->nvram_protect);
  661 + qemu_put_be32(f, s->offset238);
  662 + for (i = 0; i < 15; i++)
  663 + qemu_put_be32(f, s->rem_speed[i]);
  664 + qemu_put_be32(f, s->imr_jazz);
  665 + qemu_put_be32(f, s->isr_jazz);
  666 + qemu_put_be32(f, s->itr);
  667 +}
  668 +
605 static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write) 669 static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write)
606 { 670 {
607 rc4030State *s = opaque; 671 rc4030State *s = opaque;
@@ -728,6 +792,7 @@ qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, @@ -728,6 +792,7 @@ qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
728 s->jazz_bus_irq = jazz_bus; 792 s->jazz_bus_irq = jazz_bus;
729 793
730 qemu_register_reset(rc4030_reset, s); 794 qemu_register_reset(rc4030_reset, s);
  795 + register_savevm("rc4030", 0, 1, rc4030_save, rc4030_load, s);
731 rc4030_reset(s); 796 rc4030_reset(s);
732 797
733 s_chipset = cpu_register_io_memory(0, rc4030_read, rc4030_write, s); 798 s_chipset = cpu_register_io_memory(0, rc4030_read, rc4030_write, s);