Commit d56dd6cf031075bef985c831146691fdeec8af5c
Committed by
Anthony Liguori
1 parent
32993977
use constant IOPORTS_MASK instead of 0xffff.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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5 changed files
with
16 additions
and
15 deletions
hw/apb_pci.c
... | ... | @@ -148,26 +148,26 @@ static CPUReadMemoryFunc *pci_apb_read[] = { |
148 | 148 | static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr, |
149 | 149 | uint32_t val) |
150 | 150 | { |
151 | - cpu_outb(NULL, addr & 0xffff, val); | |
151 | + cpu_outb(NULL, addr & IOPORTS_MASK, val); | |
152 | 152 | } |
153 | 153 | |
154 | 154 | static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr, |
155 | 155 | uint32_t val) |
156 | 156 | { |
157 | - cpu_outw(NULL, addr & 0xffff, val); | |
157 | + cpu_outw(NULL, addr & IOPORTS_MASK, val); | |
158 | 158 | } |
159 | 159 | |
160 | 160 | static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr, |
161 | 161 | uint32_t val) |
162 | 162 | { |
163 | - cpu_outl(NULL, addr & 0xffff, val); | |
163 | + cpu_outl(NULL, addr & IOPORTS_MASK, val); | |
164 | 164 | } |
165 | 165 | |
166 | 166 | static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr) |
167 | 167 | { |
168 | 168 | uint32_t val; |
169 | 169 | |
170 | - val = cpu_inb(NULL, addr & 0xffff); | |
170 | + val = cpu_inb(NULL, addr & IOPORTS_MASK); | |
171 | 171 | return val; |
172 | 172 | } |
173 | 173 | |
... | ... | @@ -175,7 +175,7 @@ static uint32_t pci_apb_ioreadw (void *opaque, target_phys_addr_t addr) |
175 | 175 | { |
176 | 176 | uint32_t val; |
177 | 177 | |
178 | - val = cpu_inw(NULL, addr & 0xffff); | |
178 | + val = cpu_inw(NULL, addr & IOPORTS_MASK); | |
179 | 179 | return val; |
180 | 180 | } |
181 | 181 | |
... | ... | @@ -183,7 +183,7 @@ static uint32_t pci_apb_ioreadl (void *opaque, target_phys_addr_t addr) |
183 | 183 | { |
184 | 184 | uint32_t val; |
185 | 185 | |
186 | - val = cpu_inl(NULL, addr & 0xffff); | |
186 | + val = cpu_inl(NULL, addr & IOPORTS_MASK); | |
187 | 187 | return val; |
188 | 188 | } |
189 | 189 | ... | ... |
hw/isa_mmio.c
... | ... | @@ -28,7 +28,7 @@ |
28 | 28 | static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr, |
29 | 29 | uint32_t val) |
30 | 30 | { |
31 | - cpu_outb(NULL, addr & 0xffff, val); | |
31 | + cpu_outb(NULL, addr & IOPORTS_MASK, val); | |
32 | 32 | } |
33 | 33 | |
34 | 34 | static void isa_mmio_writew (void *opaque, target_phys_addr_t addr, |
... | ... | @@ -37,7 +37,7 @@ static void isa_mmio_writew (void *opaque, target_phys_addr_t addr, |
37 | 37 | #ifdef TARGET_WORDS_BIGENDIAN |
38 | 38 | val = bswap16(val); |
39 | 39 | #endif |
40 | - cpu_outw(NULL, addr & 0xffff, val); | |
40 | + cpu_outw(NULL, addr & IOPORTS_MASK, val); | |
41 | 41 | } |
42 | 42 | |
43 | 43 | static void isa_mmio_writel (void *opaque, target_phys_addr_t addr, |
... | ... | @@ -46,14 +46,14 @@ static void isa_mmio_writel (void *opaque, target_phys_addr_t addr, |
46 | 46 | #ifdef TARGET_WORDS_BIGENDIAN |
47 | 47 | val = bswap32(val); |
48 | 48 | #endif |
49 | - cpu_outl(NULL, addr & 0xffff, val); | |
49 | + cpu_outl(NULL, addr & IOPORTS_MASK, val); | |
50 | 50 | } |
51 | 51 | |
52 | 52 | static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr) |
53 | 53 | { |
54 | 54 | uint32_t val; |
55 | 55 | |
56 | - val = cpu_inb(NULL, addr & 0xffff); | |
56 | + val = cpu_inb(NULL, addr & IOPORTS_MASK); | |
57 | 57 | return val; |
58 | 58 | } |
59 | 59 | |
... | ... | @@ -61,7 +61,7 @@ static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr) |
61 | 61 | { |
62 | 62 | uint32_t val; |
63 | 63 | |
64 | - val = cpu_inw(NULL, addr & 0xffff); | |
64 | + val = cpu_inw(NULL, addr & IOPORTS_MASK); | |
65 | 65 | #ifdef TARGET_WORDS_BIGENDIAN |
66 | 66 | val = bswap16(val); |
67 | 67 | #endif |
... | ... | @@ -72,7 +72,7 @@ static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr) |
72 | 72 | { |
73 | 73 | uint32_t val; |
74 | 74 | |
75 | - val = cpu_inl(NULL, addr & 0xffff); | |
75 | + val = cpu_inl(NULL, addr & IOPORTS_MASK); | |
76 | 76 | #ifdef TARGET_WORDS_BIGENDIAN |
77 | 77 | val = bswap32(val); |
78 | 78 | #endif | ... | ... |
ioport.c
... | ... | @@ -94,7 +94,7 @@ static uint32_t default_ioport_readw(void *opaque, uint32_t address) |
94 | 94 | { |
95 | 95 | uint32_t data; |
96 | 96 | data = ioport_read(0, address); |
97 | - address = (address + 1) & (MAX_IOPORTS - 1); | |
97 | + address = (address + 1) & IOPORTS_MASK; | |
98 | 98 | data |= ioport_read(0, address) << 8; |
99 | 99 | return data; |
100 | 100 | } |
... | ... | @@ -102,7 +102,7 @@ static uint32_t default_ioport_readw(void *opaque, uint32_t address) |
102 | 102 | static void default_ioport_writew(void *opaque, uint32_t address, uint32_t data) |
103 | 103 | { |
104 | 104 | ioport_write(0, address, data & 0xff); |
105 | - address = (address + 1) & (MAX_IOPORTS - 1); | |
105 | + address = (address + 1) & IOPORTS_MASK; | |
106 | 106 | ioport_write(0, address, (data >> 8) & 0xff); |
107 | 107 | } |
108 | 108 | ... | ... |
ioport.h
... | ... | @@ -28,6 +28,7 @@ |
28 | 28 | #include "qemu-common.h" |
29 | 29 | |
30 | 30 | #define MAX_IOPORTS (64 * 1024) |
31 | +#define IOPORTS_MASK (MAX_IOPORTS - 1) | |
31 | 32 | |
32 | 33 | /* These should really be in isa.h, but are here to make pc.h happy. */ |
33 | 34 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | ... | ... |
monitor.c
... | ... | @@ -1161,7 +1161,7 @@ static void do_ioport_read(Monitor *mon, int count, int format, int size, |
1161 | 1161 | int suffix; |
1162 | 1162 | |
1163 | 1163 | if (has_index) { |
1164 | - cpu_outb(NULL, addr & 0xffff, index & 0xff); | |
1164 | + cpu_outb(NULL, addr & IOPORTS_MASK, index & 0xff); | |
1165 | 1165 | addr++; |
1166 | 1166 | } |
1167 | 1167 | addr &= 0xffff; | ... | ... |