gwj / at91sam9263 · Commits

Commit d39c0b990a243fba280eb4222daf685491431a5b

Authored by bellard
1 parent 2b03a7a5

fixed MMU bug on code page boundary 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1362 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 8 additions and 4 deletions
target-sparc/translate.c
  View file @d39c0b9
@@ -1395,24 +1395,24 @@ static void disas_sparc_insn(DisasContext * dc) @@ -1395,24 +1395,24 @@ static void disas_sparc_insn(DisasContext * dc)
1395 if (!supervisor(dc)) 1395 if (!supervisor(dc))
1396 goto priv_insn; 1396 goto priv_insn;
1397 gen_op_sta(insn, 0, 4, 0); 1397 gen_op_sta(insn, 0, 4, 0);
1398 - break; 1398 + break;
1399 case 0x15: 1399 case 0x15:
1400 if (!supervisor(dc)) 1400 if (!supervisor(dc))
1401 goto priv_insn; 1401 goto priv_insn;
1402 gen_op_stba(insn, 0, 1, 0); 1402 gen_op_stba(insn, 0, 1, 0);
1403 - break; 1403 + break;
1404 case 0x16: 1404 case 0x16:
1405 if (!supervisor(dc)) 1405 if (!supervisor(dc))
1406 goto priv_insn; 1406 goto priv_insn;
1407 gen_op_stha(insn, 0, 2, 0); 1407 gen_op_stha(insn, 0, 2, 0);
1408 - break; 1408 + break;
1409 case 0x17: 1409 case 0x17:
1410 if (!supervisor(dc)) 1410 if (!supervisor(dc))
1411 goto priv_insn; 1411 goto priv_insn;
1412 flush_T2(dc); 1412 flush_T2(dc);
1413 gen_movl_reg_T2(rd + 1); 1413 gen_movl_reg_T2(rd + 1);
1414 gen_op_stda(insn, 0, 8, 0); 1414 gen_op_stda(insn, 0, 8, 0);
1415 - break; 1415 + break;
1416 #endif 1416 #endif
1417 default: 1417 default:
1418 case 0x0e: /* V9 stx */ 1418 case 0x0e: /* V9 stx */
@@ -1545,6 +1545,10 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, @@ -1545,6 +1545,10 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
1545 /* if the next PC is different, we abort now */ 1545 /* if the next PC is different, we abort now */
1546 if (dc->pc != (last_pc + 4)) 1546 if (dc->pc != (last_pc + 4))
1547 break; 1547 break;
  1548 + /* if we reach a page boundary, we stop generation so that the
  1549 + PC of a TT_TFAULT exception is always in the right page */
  1550 + if ((dc->pc & (TARGET_PAGE_SIZE - 1)) == 0)
  1551 + break;
1548 /* if single step mode, we generate only one instruction and 1552 /* if single step mode, we generate only one instruction and
1549 generate an exception */ 1553 generate an exception */
1550 if (env->singlestep_enabled) { 1554 if (env->singlestep_enabled) {