gwj / at91sam9263 · Commits

Commit d297f464d386f85eda77263d81c598c7aaff46d9

Authored by edgar_igl
1 parent a50f5b91

Avoid CRIS related warnings by Jan Kiszka. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4804 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 5 changed files with 50 additions and 37 deletions
hw/etraxfs_dma.c
  View file @d297f46
... ... @@ -214,6 +214,7 @@ static inline int fs_channel(target_phys_addr_t base, target_phys_addr_t addr)
214 214 return (addr - base) >> 13;
215 215 }
216 216  
  217 +#ifdef USE_THIS_DEAD_CODE
217 218 static void channel_load_g(struct fs_dma_ctrl *ctrl, int c)
218 219 {
219 220 target_phys_addr_t addr = channel_reg(ctrl, c, RW_GROUP);
... ... @@ -227,23 +228,24 @@ static void channel_load_g(struct fs_dma_ctrl *ctrl, int c)
227 228 static void dump_c(int ch, struct dma_descr_context *c)
228 229 {
229 230 printf("%s ch=%d\n", __func__, ch);
230   - printf("next=%x\n", (uint32_t) c->next);
231   - printf("saved_data=%x\n", (uint32_t) c->saved_data);
232   - printf("saved_data_buf=%x\n", (uint32_t) c->saved_data_buf);
  231 + printf("next=%p\n", c->next);
  232 + printf("saved_data=%p\n", c->saved_data);
  233 + printf("saved_data_buf=%p\n", c->saved_data_buf);
233 234 printf("eol=%x\n", (uint32_t) c->eol);
234 235 }
235 236  
236 237 static void dump_d(int ch, struct dma_descr_data *d)
237 238 {
238 239 printf("%s ch=%d\n", __func__, ch);
239   - printf("next=%x\n", (uint32_t) d->next);
240   - printf("buf=%x\n", (uint32_t) d->buf);
241   - printf("after=%x\n", (uint32_t) d->after);
  240 + printf("next=%p\n", d->next);
  241 + printf("buf=%p\n", d->buf);
  242 + printf("after=%p\n", d->after);
242 243 printf("intr=%x\n", (uint32_t) d->intr);
243 244 printf("out_eop=%x\n", (uint32_t) d->out_eop);
244 245 printf("in_eop=%x\n", (uint32_t) d->in_eop);
245 246 printf("eol=%x\n", (uint32_t) d->eol);
246 247 }
  248 +#endif
247 249  
248 250 static void channel_load_c(struct fs_dma_ctrl *ctrl, int c)
249 251 {
... ... @@ -256,10 +258,10 @@ static void channel_load_c(struct fs_dma_ctrl *ctrl, int c)
256 258  
257 259 D(dump_c(c, &ctrl->channels[c].current_c));
258 260 /* I guess this should update the current pos. */
259   - ctrl->channels[c].regs[RW_SAVED_DATA] =
260   - (uint32_t)ctrl->channels[c].current_c.saved_data;
  261 + ctrl->channels[c].regs[RW_SAVED_DATA] =
  262 + (uint32_t)(unsigned long)ctrl->channels[c].current_c.saved_data;
261 263 ctrl->channels[c].regs[RW_SAVED_DATA_BUF] =
262   - (uint32_t)ctrl->channels[c].current_c.saved_data_buf;
  264 + (uint32_t)(unsigned long)ctrl->channels[c].current_c.saved_data_buf;
263 265 }
264 266  
265 267 static void channel_load_d(struct fs_dma_ctrl *ctrl, int c)
... ... @@ -339,12 +341,12 @@ static void channel_continue(struct fs_dma_ctrl *ctrl, int c)
339 341 D(printf("continue %d ok %p\n", c,
340 342 ctrl->channels[c].current_d.next));
341 343 ctrl->channels[c].regs[RW_SAVED_DATA] =
342   - (uint32_t) ctrl->channels[c].current_d.next;
  344 + (uint32_t)(unsigned long)ctrl->channels[c].current_d.next;
343 345 channel_load_d(ctrl, c);
344 346 channel_start(ctrl, c);
345 347 }
346 348 ctrl->channels[c].regs[RW_SAVED_DATA_BUF] =
347   - (uint32_t) ctrl->channels[c].current_d.buf;
  349 + (uint32_t)(unsigned long)ctrl->channels[c].current_d.buf;
348 350 }
349 351  
350 352 static void channel_stream_cmd(struct fs_dma_ctrl *ctrl, int c, uint32_t v)
... ... @@ -402,7 +404,7 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
402 404 (uint32_t)ctrl->channels[c].current_d.after,
403 405 saved_data_buf));
404 406  
405   - len = (uint32_t) ctrl->channels[c].current_d.after;
  407 + len = (uint32_t)(unsigned long) ctrl->channels[c].current_d.after;
406 408 len -= saved_data_buf;
407 409  
408 410 if (len > sizeof buf)
... ... @@ -420,7 +422,8 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
420 422  
421 423 saved_data_buf += len;
422 424  
423   - if (saved_data_buf == (uint32_t)ctrl->channels[c].current_d.after) {
  425 + if (saved_data_buf ==
  426 + (uint32_t)(unsigned long)ctrl->channels[c].current_d.after) {
424 427 /* Done. Step to next. */
425 428 if (ctrl->channels[c].current_d.out_eop) {
426 429 /* TODO: signal eop to the client. */
... ... @@ -444,10 +447,10 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
444 447 channel_stop(ctrl, c);
445 448 } else {
446 449 ctrl->channels[c].regs[RW_SAVED_DATA] =
447   - (uint32_t) ctrl->channels[c].current_d.next;
  450 + (uint32_t)(unsigned long) ctrl->channels[c].current_d.next;
448 451 /* Load new descriptor. */
449 452 channel_load_d(ctrl, c);
450   - saved_data_buf = (uint32_t)
  453 + saved_data_buf = (uint32_t)(unsigned long)
451 454 ctrl->channels[c].current_d.buf;
452 455 }
453 456  
... ... @@ -468,7 +471,7 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
468 471 return 0;
469 472  
470 473 saved_data_buf = channel_reg(ctrl, c, RW_SAVED_DATA_BUF);
471   - len = (uint32_t) ctrl->channels[c].current_d.after;
  474 + len = (uint32_t)(unsigned long) ctrl->channels[c].current_d.after;
472 475 len -= saved_data_buf;
473 476  
474 477 if (len > buflen)
... ... @@ -477,7 +480,8 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
477 480 cpu_physical_memory_write (saved_data_buf, buf, len);
478 481 saved_data_buf += len;
479 482  
480   - if (saved_data_buf == (uint32_t)ctrl->channels[c].current_d.after
  483 + if (saved_data_buf ==
  484 + (uint32_t)(unsigned long)ctrl->channels[c].current_d.after
481 485 || eop) {
482 486 uint32_t r_intr = ctrl->channels[c].regs[R_INTR];
483 487  
... ... @@ -485,7 +489,7 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
485 489 ctrl->channels[c].current_d.after
486 490 - ctrl->channels[c].current_d.buf));
487 491 ctrl->channels[c].current_d.after =
488   - (void *) saved_data_buf;
  492 + (void *)(unsigned long) saved_data_buf;
489 493  
490 494 /* Done. Step to next. */
491 495 if (ctrl->channels[c].current_d.intr) {
... ... @@ -514,10 +518,10 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
514 518 channel_stop(ctrl, c);
515 519 } else {
516 520 ctrl->channels[c].regs[RW_SAVED_DATA] =
517   - (uint32_t) ctrl->channels[c].current_d.next;
  521 + (uint32_t)(unsigned long) ctrl->channels[c].current_d.next;
518 522 /* Load new descriptor. */
519 523 channel_load_d(ctrl, c);
520   - saved_data_buf = (uint32_t)
  524 + saved_data_buf = (uint32_t)(unsigned long)
521 525 ctrl->channels[c].current_d.buf;
522 526 }
523 527 }
... ... @@ -537,8 +541,8 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
537 541 {
538 542 struct fs_dma_ctrl *ctrl = opaque;
539 543 CPUState *env = ctrl->env;
540   - cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
541   - addr, env->pc);
  544 + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
  545 + " pc=%x.\n", addr, env->pc);
542 546 return 0;
543 547 }
544 548  
... ... @@ -574,8 +578,8 @@ dma_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
574 578 {
575 579 struct fs_dma_ctrl *ctrl = opaque;
576 580 CPUState *env = ctrl->env;
577   - cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
578   - addr, env->pc);
  581 + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
  582 + " pc=%x.\n", addr, env->pc);
579 583 }
580 584  
581 585 static void
... ...
hw/etraxfs_eth.c
  View file @d297f46
... ... @@ -154,11 +154,13 @@ mdio_attach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr)
154 154 bus->devs[addr & 0x1f] = phy;
155 155 }
156 156  
  157 +#ifdef USE_THIS_DEAD_CODE
157 158 static void
158 159 mdio_detach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr)
159 160 {
160 161 bus->devs[addr & 0x1f] = NULL;
161 162 }
  163 +#endif
162 164  
163 165 static void mdio_read_req(struct qemu_mdio *bus)
164 166 {
... ... @@ -328,8 +330,8 @@ static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr)
328 330 {
329 331 struct fs_eth *eth = opaque;
330 332 CPUState *env = eth->env;
331   - cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
332   - addr, env->pc);
  333 + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
  334 + " pc=%x.\n", addr, env->pc);
333 335 return 0;
334 336 }
335 337  
... ... @@ -359,8 +361,8 @@ eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
359 361 {
360 362 struct fs_eth *eth = opaque;
361 363 CPUState *env = eth->env;
362   - cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
363   - addr, env->pc);
  364 + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
  365 + " pc=%x.\n", addr, env->pc);
364 366 }
365 367  
366 368 static void eth_update_ma(struct fs_eth *eth, int ma)
... ...
hw/etraxfs_timer.c
  View file @d297f46
... ... @@ -80,8 +80,8 @@ static uint32_t timer_rinvalid (void *opaque, target_phys_addr_t addr)
80 80 {
81 81 struct fs_timer_t *t = opaque;
82 82 CPUState *env = t->env;
83   - cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
84   - addr, env->pc);
  83 + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
  84 + " pc=%x.\n", addr, env->pc);
85 85 return 0;
86 86 }
87 87  
... ... @@ -120,8 +120,8 @@ timer_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
120 120 {
121 121 struct fs_timer_t *t = opaque;
122 122 CPUState *env = t->env;
123   - cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
124   - addr, env->pc);
  123 + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
  124 + " pc=%x.\n", addr, env->pc);
125 125 }
126 126  
127 127 #define TIMER_SLOWDOWN 1
... ... @@ -309,7 +309,7 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
309 309 t->rw_ack_intr = 0;
310 310 break;
311 311 default:
312   - printf ("%s %x %x pc=%x\n",
  312 + printf ("%s " TARGET_FMT_plx " %x pc=%x\n",
313 313 __func__, addr, value, env->pc);
314 314 break;
315 315 }
... ...
target-cris/mmu.c
  View file @d297f46
... ... @@ -30,7 +30,11 @@
30 30 #include "mmu.h"
31 31 #include "exec-all.h"
32 32  
  33 +#ifdef DEBUG
  34 +#define D(x) x
  35 +#else
33 36 #define D(x)
  37 +#endif
34 38  
35 39 void cris_mmu_init(CPUState *env)
36 40 {
... ... @@ -95,6 +99,7 @@ static inline void set_field(uint32_t *dst, unsigned int val,
95 99 *dst |= val;
96 100 }
97 101  
  102 +#ifdef DEBUG
98 103 static void dump_tlb(CPUState *env, int mmu)
99 104 {
100 105 int set;
... ... @@ -113,6 +118,7 @@ static void dump_tlb(CPUState *env, int mmu)
113 118 }
114 119 }
115 120 }
  121 +#endif
116 122  
117 123 /* rw 0 = read, 1 = write, 2 = exec. */
118 124 static int cris_mmu_translate_page(struct cris_mmu_result_t *res,
... ...
target-cris/translate.c
  View file @d297f46
... ... @@ -3075,14 +3075,15 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
3075 3075  
3076 3076 if (loglevel & CPU_LOG_TB_IN_ASM) {
3077 3077 fprintf(logfile,
3078   - "srch=%d pc=%x %x flg=%llx bt=%x ds=%lld ccs=%x\n"
  3078 + "srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n"
3079 3079 "pid=%x usp=%x\n"
3080 3080 "%x.%x.%x.%x\n"
3081 3081 "%x.%x.%x.%x\n"
3082 3082 "%x.%x.%x.%x\n"
3083 3083 "%x.%x.%x.%x\n",
3084   - search_pc, dc->pc, dc->ppc, tb->flags,
3085   - env->btarget, tb->flags & 7,
  3084 + search_pc, dc->pc, dc->ppc,
  3085 + (unsigned long long)tb->flags,
  3086 + env->btarget, (unsigned)tb->flags & 7,
3086 3087 env->pregs[PR_CCS],
3087 3088 env->pregs[PR_PID], env->pregs[PR_USP],
3088 3089 env->regs[0], env->regs[1], env->regs[2], env->regs[3],
... ... @@ -3228,7 +3229,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
3228 3229 fprintf(logfile, "--------------\n");
3229 3230 fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
3230 3231 target_disas(logfile, pc_start, dc->pc - pc_start, 0);
3231   - fprintf(logfile, "\nisize=%d osize=%d\n",
  3232 + fprintf(logfile, "\nisize=%d osize=%zd\n",
3232 3233 dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
3233 3234 }
3234 3235 #endif
... ...