Commit d27cf0ae6dae753ae4f7c5eac3e375fbc11cb417
1 parent
f40070c3
Sparc32/Sparc64/PPC: convert m48txx to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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1 changed file
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42 additions
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17 deletions
hw/m48t59.c
... | ... | @@ -23,9 +23,9 @@ |
23 | 23 | */ |
24 | 24 | #include "hw.h" |
25 | 25 | #include "nvram.h" |
26 | -#include "isa.h" | |
27 | 26 | #include "qemu-timer.h" |
28 | 27 | #include "sysemu.h" |
28 | +#include "sysbus.h" | |
29 | 29 | |
30 | 30 | //#define DEBUG_NVRAM |
31 | 31 | |
... | ... | @@ -41,11 +41,11 @@ |
41 | 41 | * PPC platform there is also a nvram lock function. |
42 | 42 | */ |
43 | 43 | struct m48t59_t { |
44 | + SysBusDevice busdev; | |
44 | 45 | /* Model parameters */ |
45 | 46 | int type; // 2 = m48t02, 8 = m48t08, 59 = m48t59 |
46 | 47 | /* Hardware parameters */ |
47 | 48 | qemu_irq IRQ; |
48 | - int mem_index; | |
49 | 49 | uint32_t io_base; |
50 | 50 | uint16_t size; |
51 | 51 | /* RTC management */ |
... | ... | @@ -618,32 +618,57 @@ m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base, |
618 | 618 | uint32_t io_base, uint16_t size, |
619 | 619 | int type) |
620 | 620 | { |
621 | - m48t59_t *s; | |
622 | - target_phys_addr_t save_base; | |
623 | - | |
624 | - s = qemu_mallocz(sizeof(m48t59_t)); | |
625 | - s->buffer = qemu_mallocz(size); | |
626 | - s->IRQ = IRQ; | |
627 | - s->size = size; | |
628 | - s->io_base = io_base; | |
629 | - s->type = type; | |
621 | + DeviceState *dev; | |
622 | + SysBusDevice *s; | |
623 | + m48t59_t *d; | |
624 | + | |
625 | + dev = qdev_create(NULL, "m48t59"); | |
626 | + qdev_set_prop_int(dev, "type", type); | |
627 | + qdev_set_prop_int(dev, "size", size); | |
628 | + qdev_set_prop_int(dev, "io_base", io_base); | |
629 | + qdev_init(dev); | |
630 | + s = sysbus_from_qdev(dev); | |
631 | + sysbus_connect_irq(s, 0, IRQ); | |
630 | 632 | if (io_base != 0) { |
631 | 633 | register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s); |
632 | 634 | register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s); |
633 | 635 | } |
634 | 636 | if (mem_base != 0) { |
635 | - s->mem_index = cpu_register_io_memory(nvram_read, nvram_write, s); | |
636 | - cpu_register_physical_memory(mem_base, size, s->mem_index); | |
637 | + sysbus_mmio_map(s, 0, mem_base); | |
637 | 638 | } |
638 | - if (type == 59) { | |
639 | + | |
640 | + d = FROM_SYSBUS(m48t59_t, s); | |
641 | + | |
642 | + return d; | |
643 | +} | |
644 | + | |
645 | +static void m48t59_init1(SysBusDevice *dev) | |
646 | +{ | |
647 | + m48t59_t *s = FROM_SYSBUS(m48t59_t, dev); | |
648 | + int mem_index; | |
649 | + | |
650 | + s->size = qdev_get_prop_int(&dev->qdev, "size", -1); | |
651 | + s->buffer = qemu_mallocz(s->size); | |
652 | + sysbus_init_irq(dev, &s->IRQ); | |
653 | + s->io_base = qdev_get_prop_int(&dev->qdev, "io_base", 0); | |
654 | + s->type = qdev_get_prop_int(&dev->qdev, "type", -1); | |
655 | + | |
656 | + mem_index = cpu_register_io_memory(nvram_read, nvram_write, s); | |
657 | + sysbus_init_mmio(dev, s->size, mem_index); | |
658 | + | |
659 | + if (s->type == 59) { | |
639 | 660 | s->alrm_timer = qemu_new_timer(vm_clock, &alarm_cb, s); |
640 | 661 | s->wd_timer = qemu_new_timer(vm_clock, &watchdog_cb, s); |
641 | 662 | } |
642 | 663 | qemu_get_timedate(&s->alarm, 0); |
643 | 664 | |
644 | 665 | qemu_register_reset(m48t59_reset, s); |
645 | - save_base = mem_base ? mem_base : io_base; | |
646 | - register_savevm("m48t59", save_base, 1, m48t59_save, m48t59_load, s); | |
666 | + register_savevm("m48t59", -1, 1, m48t59_save, m48t59_load, s); | |
667 | +} | |
647 | 668 | |
648 | - return s; | |
669 | +static void m48t59_register_devices(void) | |
670 | +{ | |
671 | + sysbus_register_dev("m48t59", sizeof(m48t59_t), m48t59_init1); | |
649 | 672 | } |
673 | + | |
674 | +device_init(m48t59_register_devices) | ... | ... |