gwj / at91sam9263 · Commits

Commit d26bfc9a1b449db84b80d39ed9d870671a944e5c

Authored by j_mayer
1 parent 7875ed20

Add MSR bits signification per PowerPC implementation flags (to be continued). 

As a side effect, single step and branch step are available again.
Remove irrelevant MSR bits definitions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 4 changed files with 122 additions and 61 deletions
target-ppc/cpu.h
  View file @d26bfc9
... ... @@ -347,40 +347,37 @@ union ppc_tlb_t {
347 347 #define MSR_CM 31 /* Computation mode for BookE hflags */
348 348 #define MSR_ICM 30 /* Interrupt computation mode for BookE */
349 349 #define MSR_UCLE 26 /* User-mode cache lock enable for BookE */
350   -#define MSR_VR 25 /* altivec available hflags */
351   -#define MSR_SPE 25 /* SPE enable for BookE hflags */
  350 +#define MSR_VR 25 /* altivec available x hflags */
  351 +#define MSR_SPE 25 /* SPE enable for BookE x hflags */
352 352 #define MSR_AP 23 /* Access privilege state on 602 hflags */
353 353 #define MSR_SA 22 /* Supervisor access mode on 602 hflags */
354 354 #define MSR_KEY 19 /* key bit on 603e */
355   -#define MSR_POW 18 /* Power management */
356   -#define MSR_WE 18 /* Wait state enable on embedded PowerPC */
357   -#define MSR_TGPR 17 /* TGPR usage on 602/603 */
358   -#define MSR_TLB 17 /* TLB update on ? */
359   -#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC */
  355 +#define MSR_POW 18 /* Power management x */
  356 +#define MSR_WE 18 /* Wait state enable on embedded PowerPC x */
  357 +#define MSR_TGPR 17 /* TGPR usage on 602/603 x */
  358 +#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC x */
360 359 #define MSR_ILE 16 /* Interrupt little-endian mode */
361 360 #define MSR_EE 15 /* External interrupt enable */
362 361 #define MSR_PR 14 /* Problem state hflags */
363 362 #define MSR_FP 13 /* Floating point available hflags */
364 363 #define MSR_ME 12 /* Machine check interrupt enable */
365 364 #define MSR_FE0 11 /* Floating point exception mode 0 hflags */
366   -#define MSR_SE 10 /* Single-step trace enable hflags */
367   -#define MSR_DWE 10 /* Debug wait enable on 405 */
368   -#define MSR_UBLE 10 /* User BTB lock enable on e500 */
369   -#define MSR_BE 9 /* Branch trace enable hflags */
370   -#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC */
  365 +#define MSR_SE 10 /* Single-step trace enable x hflags */
  366 +#define MSR_DWE 10 /* Debug wait enable on 405 x */
  367 +#define MSR_UBLE 10 /* User BTB lock enable on e500 x */
  368 +#define MSR_BE 9 /* Branch trace enable x hflags */
  369 +#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC x */
371 370 #define MSR_FE1 8 /* Floating point exception mode 1 hflags */
372 371 #define MSR_AL 7 /* AL bit on POWER */
373 372 #define MSR_IP 6 /* Interrupt prefix */
374 373 #define MSR_IR 5 /* Instruction relocate */
375   -#define MSR_IS 5 /* Instruction address space on embedded PowerPC */
376 374 #define MSR_DR 4 /* Data relocate */
377   -#define MSR_DS 4 /* Data address space on embedded PowerPC */
378   -#define MSR_PE 3 /* Protection enable on 403 */
379   -#define MSR_EP 3 /* Exception prefix on 601 */
380   -#define MSR_PX 2 /* Protection exclusive on 403 */
381   -#define MSR_PMM 2 /* Performance monitor mark on POWER */
382   -#define MSR_RI 1 /* Recoverable interrupt */
383   -#define MSR_LE 0 /* Little-endian mode hflags */
  375 +#define MSR_PE 3 /* Protection enable on 403 x */
  376 +#define MSR_EP 3 /* Exception prefix on 601 x */
  377 +#define MSR_PX 2 /* Protection exclusive on 403 x */
  378 +#define MSR_PMM 2 /* Performance monitor mark on POWER x */
  379 +#define MSR_RI 1 /* Recoverable interrupt 1 */
  380 +#define MSR_LE 0 /* Little-endian mode 1 hflags */
384 381 #define msr_sf env->msr[MSR_SF]
385 382 #define msr_isf env->msr[MSR_ISF]
386 383 #define msr_hv env->msr[MSR_HV]
... ... @@ -395,7 +392,6 @@ union ppc_tlb_t {
395 392 #define msr_pow env->msr[MSR_POW]
396 393 #define msr_we env->msr[MSR_WE]
397 394 #define msr_tgpr env->msr[MSR_TGPR]
398   -#define msr_tlb env->msr[MSR_TLB]
399 395 #define msr_ce env->msr[MSR_CE]
400 396 #define msr_ile env->msr[MSR_ILE]
401 397 #define msr_ee env->msr[MSR_EE]
... ... @@ -412,9 +408,7 @@ union ppc_tlb_t {
412 408 #define msr_al env->msr[MSR_AL]
413 409 #define msr_ip env->msr[MSR_IP]
414 410 #define msr_ir env->msr[MSR_IR]
415   -#define msr_is env->msr[MSR_IS]
416 411 #define msr_dr env->msr[MSR_DR]
417   -#define msr_ds env->msr[MSR_DS]
418 412 #define msr_pe env->msr[MSR_PE]
419 413 #define msr_ep env->msr[MSR_EP]
420 414 #define msr_px env->msr[MSR_PX]
... ... @@ -422,6 +416,33 @@ union ppc_tlb_t {
422 416 #define msr_ri env->msr[MSR_RI]
423 417 #define msr_le env->msr[MSR_LE]
424 418  
  419 +enum {
  420 + /* Beware that MSR bits are given using IBM standard (ie MSB is 0 !) */
  421 + POWERPC_FLAG_NONE = 0x00000000,
  422 + /* Flag for MSR bit 25 signification (VRE/SPE) */
  423 + POWERPC_FLAG_SPE = 0x00000001,
  424 + POWERPC_FLAG_VRE = 0x00000002,
  425 + /* Flag for MSR bit 18 may not be needed... */
  426 + POWERPC_FLAG_POW = 0x00000004,
  427 + POWERPC_FLAG_WE = 0x00000008,
  428 + /* Flag for MSR bit 17 signification (TGPR/CE) */
  429 + POWERPC_FLAG_TGPR = 0x00000010,
  430 + POWERPC_FLAG_CE = 0x00000020,
  431 + /* Flag for MSR bit 10 signification (SE/DWE/UBLE) */
  432 + POWERPC_FLAG_SE = 0x00000040,
  433 + POWERPC_FLAG_DWE = 0x00000080,
  434 + POWERPC_FLAG_UBLE = 0x00000100,
  435 + /* Flag for MSR bit 9 signification (BE/DE) */
  436 + POWERPC_FLAG_BE = 0x00000200,
  437 + POWERPC_FLAG_DE = 0x00000400,
  438 + /* Flag for MSR bit 3 signification (PE/EP) */
  439 + POWERPC_FLAG_PE = 0x00000800,
  440 + POWERPC_FLAG_EP = 0x00001000,
  441 + /* Flag for MSR but 2 signification (PX/PMM) */
  442 + POWERPC_FLAG_PX = 0x00002000,
  443 + POWERPC_FLAG_PMM = 0x00004000,
  444 +};
  445 +
425 446 /*****************************************************************************/
426 447 /* The whole PowerPC CPU context */
427 448 struct CPUPPCState {
... ...
target-ppc/helper.c
  View file @d26bfc9
... ... @@ -1183,7 +1183,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
1183 1183 prot = (tlb->prot >> 4) & 0xF;
1184 1184 /* Check the address space */
1185 1185 if (access_type == ACCESS_CODE) {
1186   - if (msr_is != (tlb->attr & 1))
  1186 + if (msr_ir != (tlb->attr & 1))
1187 1187 continue;
1188 1188 ctx->prot = prot;
1189 1189 if (prot & PAGE_EXEC) {
... ... @@ -1192,7 +1192,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
1192 1192 }
1193 1193 ret = -3;
1194 1194 } else {
1195   - if (msr_ds != (tlb->attr & 1))
  1195 + if (msr_dr != (tlb->attr & 1))
1196 1196 continue;
1197 1197 ctx->prot = prot;
1198 1198 if ((!rw && prot & PAGE_READ) || (rw && (prot & PAGE_WRITE))) {
... ... @@ -1964,7 +1964,7 @@ target_ulong do_load_msr (CPUPPCState *env)
1964 1964 ((target_ulong)msr_sa << MSR_SA) |
1965 1965 ((target_ulong)msr_key << MSR_KEY) |
1966 1966 ((target_ulong)msr_pow << MSR_POW) | /* POW / WE */
1967   - ((target_ulong)msr_tlb << MSR_TLB) | /* TLB / TGPE / CE */
  1967 + ((target_ulong)msr_tgpr << MSR_TGPR) | /* TGPR / CE */
1968 1968 ((target_ulong)msr_ile << MSR_ILE) |
1969 1969 ((target_ulong)msr_ee << MSR_EE) |
1970 1970 ((target_ulong)msr_pr << MSR_PR) |
... ... @@ -2000,18 +2000,10 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
2000 2000 fprintf(logfile, "%s: T0 %08lx\n", __func__, value);
2001 2001 }
2002 2002 #endif
2003   - switch (env->excp_model) {
2004   - case POWERPC_EXCP_602:
2005   - case POWERPC_EXCP_603:
2006   - case POWERPC_EXCP_603E:
2007   - case POWERPC_EXCP_G2:
2008   - if (((value >> MSR_TGPR) & 1) != msr_tgpr) {
2009   - /* Swap temporary saved registers with GPRs */
2010   - swap_gpr_tgpr(env);
2011   - }
2012   - break;
2013   - default:
2014   - break;
  2003 + if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
  2004 + ((value >> MSR_TGPR) & 1) != msr_tgpr)) {
  2005 + /* Swap temporary saved registers with GPRs */
  2006 + swap_gpr_tgpr(env);
2015 2007 }
2016 2008 #if defined (TARGET_PPC64)
2017 2009 msr_sf = (value >> MSR_SF) & 1;
... ... @@ -2024,7 +2016,7 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
2024 2016 msr_sa = (value >> MSR_SA) & 1;
2025 2017 msr_key = (value >> MSR_KEY) & 1;
2026 2018 msr_pow = (value >> MSR_POW) & 1; /* POW / WE */
2027   - msr_tlb = (value >> MSR_TLB) & 1; /* TLB / TGPR / CE */
  2019 + msr_tgpr = (value >> MSR_TGPR) & 1; /* TGPR / CE */
2028 2020 msr_ile = (value >> MSR_ILE) & 1;
2029 2021 msr_ee = (value >> MSR_EE) & 1;
2030 2022 msr_pr = (value >> MSR_PR) & 1;
... ...
target-ppc/translate.c
  View file @d26bfc9
... ... @@ -6514,6 +6514,7 @@ static inline int gen_intermediate_code_internal (CPUState *env,
6514 6514 target_ulong pc_start;
6515 6515 uint16_t *gen_opc_end;
6516 6516 int supervisor;
  6517 + int single_step, branch_step;
6517 6518 int j, lj = -1;
6518 6519  
6519 6520 pc_start = tb->pc;
... ... @@ -6545,9 +6546,20 @@ static inline int gen_intermediate_code_internal (CPUState *env,
6545 6546 ctx.dcache_line_size = env->dcache_line_size;
6546 6547 ctx.fpu_enabled = msr_fp;
6547 6548 #if defined(TARGET_PPCEMB)
6548   - ctx.spe_enabled = msr_spe;
  6549 + if (env->flags & POWERPC_FLAG_SPE)
  6550 + ctx.spe_enabled = msr_spe;
  6551 + else
  6552 + ctx.spe_enabled = 0;
6549 6553 #endif
6550   - ctx.singlestep_enabled = env->singlestep_enabled;
  6554 + if ((env->flags & POWERPC_FLAG_SE) && msr_se)
  6555 + single_step = 1;
  6556 + else
  6557 + single_step = 0;
  6558 + if ((env->flags & POWERPC_FLAG_BE) && msr_be)
  6559 + branch_step = 1;
  6560 + else
  6561 + branch_step = 0;
  6562 + ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;;
6551 6563 #if defined (DO_SINGLE_STEP) && 0
6552 6564 /* Single step trace mode */
6553 6565 msr_se = 1;
... ... @@ -6642,30 +6654,24 @@ static inline int gen_intermediate_code_internal (CPUState *env,
6642 6654 handler->count++;
6643 6655 #endif
6644 6656 /* Check trace mode exceptions */
6645   -#if 0 // XXX: buggy on embedded PowerPC
6646   - if (unlikely((msr_be && ctx.exception == POWERPC_EXCP_BRANCH) ||
6647   - /* Check in single step trace mode
6648   - * we need to stop except if:
6649   - * - rfi, trap or syscall
6650   - * - first instruction of an exception handler
6651   - */
6652   - (msr_se && (ctx.nip < 0x100 ||
6653   - ctx.nip > 0xF00 ||
6654   - (ctx.nip & 0xFC) != 0x04) &&
  6657 + if (unlikely(branch_step != 0 &&
  6658 + ctx.exception == POWERPC_EXCP_BRANCH)) {
  6659 + GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
  6660 + } else if (unlikely(single_step != 0 &&
  6661 + (ctx.nip <= 0x100 || ctx.nip > 0xF00 ||
  6662 + (ctx.nip & 0xFC) != 0x04) &&
6655 6663 #if defined(CONFIG_USER_ONLY)
6656   - ctx.exception != POWERPC_EXCP_SYSCALL_USER &&
  6664 + ctx.exception != POWERPC_EXCP_SYSCALL_USER &&
6657 6665 #else
6658   - ctx.exception != POWERPC_EXCP_SYSCALL &&
  6666 + ctx.exception != POWERPC_EXCP_SYSCALL &&
6659 6667 #endif
6660   - ctx.exception != POWERPC_EXCP_TRAP))) {
  6668 + ctx.exception != POWERPC_EXCP_TRAP)) {
6661 6669 GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
6662   - }
6663   -#endif
6664   - /* if we reach a page boundary or are single stepping, stop
6665   - * generation
6666   - */
6667   - if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) ||
6668   - (env->singlestep_enabled))) {
  6670 + } else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) ||
  6671 + (env->singlestep_enabled))) {
  6672 + /* if we reach a page boundary or are single stepping, stop
  6673 + * generation
  6674 + */
6669 6675 break;
6670 6676 }
6671 6677 #if defined (DO_SINGLE_STEP)
... ...
target-ppc/translate_init.c
  View file @d26bfc9
... ... @@ -39,6 +39,7 @@ struct ppc_def_t {
39 39 uint8_t excp_model;
40 40 uint8_t bus_model;
41 41 uint8_t pad;
  42 + uint32_t flags;
42 43 int bfd_mach;
43 44 void (*init_proc)(CPUPPCState *env);
44 45 };
... ... @@ -2581,6 +2582,7 @@ static void init_excp_970 (CPUPPCState *env)
2581 2582 #define POWERPC_EXCP_401 (POWERPC_EXCP_40x)
2582 2583 #define POWERPC_INPUT_401 (PPC_FLAGS_INPUT_401)
2583 2584 #define POWERPC_BFDM_401 (bfd_mach_ppc_403)
  2585 +#define POWERPC_FLAG_401 (POWERPC_FLAG_NONE)
2584 2586  
2585 2587 static void init_proc_401 (CPUPPCState *env)
2586 2588 {
... ... @@ -2605,6 +2607,7 @@ static void init_proc_401 (CPUPPCState *env)
2605 2607 #define POWERPC_EXCP_401x2 (POWERPC_EXCP_40x)
2606 2608 #define POWERPC_INPUT_401x2 (PPC_FLAGS_INPUT_401)
2607 2609 #define POWERPC_BFDM_401x2 (bfd_mach_ppc_403)
  2610 +#define POWERPC_FLAG_401x2 (POWERPC_FLAG_NONE)
2608 2611  
2609 2612 static void init_proc_401x2 (CPUPPCState *env)
2610 2613 {
... ... @@ -2634,6 +2637,7 @@ static void init_proc_401x2 (CPUPPCState *env)
2634 2637 #define POWERPC_EXCP_401x3 (POWERPC_EXCP_40x)
2635 2638 #define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401)
2636 2639 #define POWERPC_BFDM_401x3 (bfd_mach_ppc_403)
  2640 +#define POWERPC_FLAG_401x3 (POWERPC_FLAG_NONE)
2637 2641  
2638 2642 __attribute__ (( unused ))
2639 2643 static void init_proc_401x3 (CPUPPCState *env)
... ... @@ -2661,6 +2665,7 @@ static void init_proc_401x3 (CPUPPCState *env)
2661 2665 #define POWERPC_EXCP_IOP480 (POWERPC_EXCP_40x)
2662 2666 #define POWERPC_INPUT_IOP480 (PPC_FLAGS_INPUT_401)
2663 2667 #define POWERPC_BFDM_IOP480 (bfd_mach_ppc_403)
  2668 +#define POWERPC_FLAG_IOP480 (POWERPC_FLAG_NONE)
2664 2669  
2665 2670 static void init_proc_IOP480 (CPUPPCState *env)
2666 2671 {
... ... @@ -2689,6 +2694,7 @@ static void init_proc_IOP480 (CPUPPCState *env)
2689 2694 #define POWERPC_EXCP_403 (POWERPC_EXCP_40x)
2690 2695 #define POWERPC_INPUT_403 (PPC_FLAGS_INPUT_401)
2691 2696 #define POWERPC_BFDM_403 (bfd_mach_ppc_403)
  2697 +#define POWERPC_FLAG_403 (POWERPC_FLAG_NONE)
2692 2698  
2693 2699 static void init_proc_403 (CPUPPCState *env)
2694 2700 {
... ... @@ -2717,6 +2723,7 @@ static void init_proc_403 (CPUPPCState *env)
2717 2723 #define POWERPC_EXCP_403GCX (POWERPC_EXCP_40x)
2718 2724 #define POWERPC_INPUT_403GCX (PPC_FLAGS_INPUT_401)
2719 2725 #define POWERPC_BFDM_403GCX (bfd_mach_ppc_403)
  2726 +#define POWERPC_FLAG_403GCX (POWERPC_FLAG_NONE)
2720 2727  
2721 2728 static void init_proc_403GCX (CPUPPCState *env)
2722 2729 {
... ... @@ -2758,6 +2765,7 @@ static void init_proc_403GCX (CPUPPCState *env)
2758 2765 #define POWERPC_EXCP_405 (POWERPC_EXCP_40x)
2759 2766 #define POWERPC_INPUT_405 (PPC_FLAGS_INPUT_405)
2760 2767 #define POWERPC_BFDM_405 (bfd_mach_ppc_403)
  2768 +#define POWERPC_FLAG_405 (POWERPC_FLAG_NONE)
2761 2769  
2762 2770 static void init_proc_405 (CPUPPCState *env)
2763 2771 {
... ... @@ -2797,6 +2805,7 @@ static void init_proc_405 (CPUPPCState *env)
2797 2805 #define POWERPC_EXCP_440EP (POWERPC_EXCP_BOOKE)
2798 2806 #define POWERPC_INPUT_440EP (PPC_FLAGS_INPUT_BookE)
2799 2807 #define POWERPC_BFDM_440EP (bfd_mach_ppc_403)
  2808 +#define POWERPC_FLAG_440EP (POWERPC_FLAG_NONE)
2800 2809  
2801 2810 static void init_proc_440EP (CPUPPCState *env)
2802 2811 {
... ... @@ -2842,6 +2851,7 @@ static void init_proc_440EP (CPUPPCState *env)
2842 2851 #define POWERPC_EXCP_440GP (POWERPC_EXCP_BOOKE)
2843 2852 #define POWERPC_INPUT_440GP (PPC_FLAGS_INPUT_BookE)
2844 2853 #define POWERPC_BFDM_440GP (bfd_mach_ppc_403)
  2854 +#define POWERPC_FLAG_440GP (POWERPC_FLAG_NONE)
2845 2855  
2846 2856 static void init_proc_440GP (CPUPPCState *env)
2847 2857 {
... ... @@ -2869,6 +2879,7 @@ static void init_proc_440GP (CPUPPCState *env)
2869 2879 #define POWERPC_EXCP_440x4 (POWERPC_EXCP_BOOKE)
2870 2880 #define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE)
2871 2881 #define POWERPC_BFDM_440x4 (bfd_mach_ppc_403)
  2882 +#define POWERPC_FLAG_440x4 (POWERPC_FLAG_NONE)
2872 2883  
2873 2884 __attribute__ (( unused ))
2874 2885 static void init_proc_440x4 (CPUPPCState *env)
... ... @@ -2897,6 +2908,7 @@ static void init_proc_440x4 (CPUPPCState *env)
2897 2908 #define POWERPC_EXCP_440x5 (POWERPC_EXCP_BOOKE)
2898 2909 #define POWERPC_INPUT_440x5 (PPC_FLAGS_INPUT_BookE)
2899 2910 #define POWERPC_BFDM_440x5 (bfd_mach_ppc_403)
  2911 +#define POWERPC_FLAG_440x5 (POWERPC_FLAG_NONE)
2900 2912  
2901 2913 static void init_proc_440x5 (CPUPPCState *env)
2902 2914 {
... ... @@ -2942,6 +2954,7 @@ static void init_proc_440x5 (CPUPPCState *env)
2942 2954 #define POWERPC_EXCP_460 (POWERPC_EXCP_BOOKE)
2943 2955 #define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE)
2944 2956 #define POWERPC_BFDM_460 (bfd_mach_ppc_403)
  2957 +#define POWERPC_FLAG_460 (POWERPC_FLAG_NONE)
2945 2958  
2946 2959 __attribute__ (( unused ))
2947 2960 static void init_proc_460 (CPUPPCState *env)
... ... @@ -2996,6 +3009,7 @@ static void init_proc_460 (CPUPPCState *env)
2996 3009 #define POWERPC_EXCP_460F (POWERPC_EXCP_BOOKE)
2997 3010 #define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE)
2998 3011 #define POWERPC_BFDM_460F (bfd_mach_ppc_403)
  3012 +#define POWERPC_FLAG_460F (POWERPC_FLAG_NONE)
2999 3013  
3000 3014 __attribute__ (( unused ))
3001 3015 static void init_proc_460F (CPUPPCState *env)
... ... @@ -3050,6 +3064,7 @@ static void init_proc_460F (CPUPPCState *env)
3050 3064 #define POWERPC_EXCP_BookE (POWERPC_EXCP_BOOKE)
3051 3065 #define POWERPC_INPUT_BookE (PPC_FLAGS_INPUT_BookE)
3052 3066 #define POWERPC_BFDM_BookE (bfd_mach_ppc_403)
  3067 +#define POWERPC_FLAG_BookE (POWERPC_FLAG_NONE)
3053 3068  
3054 3069 __attribute__ (( unused ))
3055 3070 static void init_proc_BookE (CPUPPCState *env)
... ... @@ -3072,6 +3087,7 @@ static void init_proc_BookE (CPUPPCState *env)
3072 3087 #define POWERPC_EXCP_e500 (POWERPC_EXCP_40x)
3073 3088 #define POWERPC_INPUT_e500 (PPC_FLAGS_INPUT_BookE)
3074 3089 #define POWERPC_BFDM_e500 (bfd_mach_ppc_403)
  3090 +#define POWERPC_FLAG_e500 (POWERPC_FLAG_SPE)
3075 3091  
3076 3092 __attribute__ (( unused ))
3077 3093 static void init_proc_e500 (CPUPPCState *env)
... ... @@ -3118,6 +3134,7 @@ static void init_proc_e500 (CPUPPCState *env)
3118 3134 //#define POWERPC_EXCP_601 (POWERPC_EXCP_601)
3119 3135 #define POWERPC_INPUT_601 (PPC_FLAGS_INPUT_6xx)
3120 3136 #define POWERPC_BFDM_601 (bfd_mach_ppc_601)
  3137 +#define POWERPC_FLAG_601 (POWERPC_FLAG_NONE)
3121 3138  
3122 3139 static void init_proc_601 (CPUPPCState *env)
3123 3140 {
... ... @@ -3171,6 +3188,7 @@ static void init_proc_601 (CPUPPCState *env)
3171 3188 //#define POWERPC_EXCP_602 (POWERPC_EXCP_602)
3172 3189 #define POWERPC_INPUT_602 (PPC_FLAGS_INPUT_6xx)
3173 3190 #define POWERPC_BFDM_602 (bfd_mach_ppc_602)
  3191 +#define POWERPC_FLAG_602 (POWERPC_FLAG_TGPR)
3174 3192  
3175 3193 static void init_proc_602 (CPUPPCState *env)
3176 3194 {
... ... @@ -3206,6 +3224,7 @@ static void init_proc_602 (CPUPPCState *env)
3206 3224 //#define POWERPC_EXCP_603 (POWERPC_EXCP_603)
3207 3225 #define POWERPC_INPUT_603 (PPC_FLAGS_INPUT_6xx)
3208 3226 #define POWERPC_BFDM_603 (bfd_mach_ppc_603)
  3227 +#define POWERPC_FLAG_603 (POWERPC_FLAG_TGPR)
3209 3228  
3210 3229 static void init_proc_603 (CPUPPCState *env)
3211 3230 {
... ... @@ -3241,6 +3260,7 @@ static void init_proc_603 (CPUPPCState *env)
3241 3260 //#define POWERPC_EXCP_603E (POWERPC_EXCP_603E)
3242 3261 #define POWERPC_INPUT_603E (PPC_FLAGS_INPUT_6xx)
3243 3262 #define POWERPC_BFDM_603E (bfd_mach_ppc_ec603e)
  3263 +#define POWERPC_FLAG_603E (POWERPC_FLAG_TGPR)
3244 3264  
3245 3265 static void init_proc_603E (CPUPPCState *env)
3246 3266 {
... ... @@ -3281,6 +3301,7 @@ static void init_proc_603E (CPUPPCState *env)
3281 3301 //#define POWERPC_EXCP_G2 (POWERPC_EXCP_G2)
3282 3302 #define POWERPC_INPUT_G2 (PPC_FLAGS_INPUT_6xx)
3283 3303 #define POWERPC_BFDM_G2 (bfd_mach_ppc_ec603e)
  3304 +#define POWERPC_FLAG_G2 (POWERPC_FLAG_TGPR)
3284 3305  
3285 3306 static void init_proc_G2 (CPUPPCState *env)
3286 3307 {
... ... @@ -3323,6 +3344,7 @@ static void init_proc_G2 (CPUPPCState *env)
3323 3344 #define POWERPC_EXCP_G2LE (POWERPC_EXCP_G2)
3324 3345 #define POWERPC_INPUT_G2LE (PPC_FLAGS_INPUT_6xx)
3325 3346 #define POWERPC_BFDM_G2LE (bfd_mach_ppc_ec603e)
  3347 +#define POWERPC_FLAG_G2LE (POWERPC_FLAG_TGPR)
3326 3348  
3327 3349 static void init_proc_G2LE (CPUPPCState *env)
3328 3350 {
... ... @@ -3365,6 +3387,7 @@ static void init_proc_G2LE (CPUPPCState *env)
3365 3387 //#define POWERPC_EXCP_604 (POWERPC_EXCP_604)
3366 3388 #define POWERPC_INPUT_604 (PPC_FLAGS_INPUT_6xx)
3367 3389 #define POWERPC_BFDM_604 (bfd_mach_ppc_604)
  3390 +#define POWERPC_FLAG_604 (POWERPC_FLAG_NONE)
3368 3391  
3369 3392 static void init_proc_604 (CPUPPCState *env)
3370 3393 {
... ... @@ -3399,6 +3422,7 @@ static void init_proc_604 (CPUPPCState *env)
3399 3422 //#define POWERPC_EXCP_7x0 (POWERPC_EXCP_7x0)
3400 3423 #define POWERPC_INPUT_7x0 (PPC_FLAGS_INPUT_6xx)
3401 3424 #define POWERPC_BFDM_7x0 (bfd_mach_ppc_750)
  3425 +#define POWERPC_FLAG_7x0 (POWERPC_FLAG_NONE)
3402 3426  
3403 3427 static void init_proc_7x0 (CPUPPCState *env)
3404 3428 {
... ... @@ -3435,6 +3459,7 @@ static void init_proc_7x0 (CPUPPCState *env)
3435 3459 #define POWERPC_EXCP_750fx (POWERPC_EXCP_7x0)
3436 3460 #define POWERPC_INPUT_750fx (PPC_FLAGS_INPUT_6xx)
3437 3461 #define POWERPC_BFDM_750fx (bfd_mach_ppc_750)
  3462 +#define POWERPC_FLAG_750fx (POWERPC_FLAG_NONE)
3438 3463  
3439 3464 static void init_proc_750fx (CPUPPCState *env)
3440 3465 {
... ... @@ -3478,6 +3503,7 @@ static void init_proc_750fx (CPUPPCState *env)
3478 3503 //#define POWERPC_EXCP_7x5 (POWERPC_EXCP_7x5)
3479 3504 #define POWERPC_INPUT_7x5 (PPC_FLAGS_INPUT_6xx)
3480 3505 #define POWERPC_BFDM_7x5 (bfd_mach_ppc_750)
  3506 +#define POWERPC_FLAG_7x5 (POWERPC_FLAG_NONE)
3481 3507  
3482 3508 static void init_proc_7x5 (CPUPPCState *env)
3483 3509 {
... ... @@ -3536,6 +3562,7 @@ static void init_proc_7x5 (CPUPPCState *env)
3536 3562 #define POWERPC_EXCP_7400 (POWERPC_EXCP_74xx)
3537 3563 #define POWERPC_INPUT_7400 (PPC_FLAGS_INPUT_6xx)
3538 3564 #define POWERPC_BFDM_7400 (bfd_mach_ppc_7400)
  3565 +#define POWERPC_FLAG_7400 (POWERPC_FLAG_VRE)
3539 3566  
3540 3567 static void init_proc_7400 (CPUPPCState *env)
3541 3568 {
... ... @@ -3565,6 +3592,7 @@ static void init_proc_7400 (CPUPPCState *env)
3565 3592 #define POWERPC_EXCP_7410 (POWERPC_EXCP_74xx)
3566 3593 #define POWERPC_INPUT_7410 (PPC_FLAGS_INPUT_6xx)
3567 3594 #define POWERPC_BFDM_7410 (bfd_mach_ppc_7400)
  3595 +#define POWERPC_FLAG_7410 (POWERPC_FLAG_VRE)
3568 3596  
3569 3597 static void init_proc_7410 (CPUPPCState *env)
3570 3598 {
... ... @@ -3606,6 +3634,7 @@ static void init_proc_7410 (CPUPPCState *env)
3606 3634 #define POWERPC_EXCP_7440 (POWERPC_EXCP_74xx)
3607 3635 #define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx)
3608 3636 #define POWERPC_BFDM_7440 (bfd_mach_ppc_7400)
  3637 +#define POWERPC_FLAG_7440 (POWERPC_FLAG_VRE)
3609 3638  
3610 3639 __attribute__ (( unused ))
3611 3640 static void init_proc_7440 (CPUPPCState *env)
... ... @@ -3674,6 +3703,7 @@ static void init_proc_7440 (CPUPPCState *env)
3674 3703 #define POWERPC_EXCP_7450 (POWERPC_EXCP_74xx)
3675 3704 #define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx)
3676 3705 #define POWERPC_BFDM_7450 (bfd_mach_ppc_7400)
  3706 +#define POWERPC_FLAG_7450 (POWERPC_FLAG_VRE)
3677 3707  
3678 3708 __attribute__ (( unused ))
3679 3709 static void init_proc_7450 (CPUPPCState *env)
... ... @@ -3744,6 +3774,7 @@ static void init_proc_7450 (CPUPPCState *env)
3744 3774 #define POWERPC_EXCP_7445 (POWERPC_EXCP_74xx)
3745 3775 #define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx)
3746 3776 #define POWERPC_BFDM_7445 (bfd_mach_ppc_7400)
  3777 +#define POWERPC_FLAG_7445 (POWERPC_FLAG_VRE)
3747 3778  
3748 3779 __attribute__ (( unused ))
3749 3780 static void init_proc_7445 (CPUPPCState *env)
... ... @@ -3846,6 +3877,7 @@ static void init_proc_7445 (CPUPPCState *env)
3846 3877 #define POWERPC_EXCP_7455 (POWERPC_EXCP_74xx)
3847 3878 #define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx)
3848 3879 #define POWERPC_BFDM_7455 (bfd_mach_ppc_7400)
  3880 +#define POWERPC_FLAG_7455 (POWERPC_FLAG_VRE)
3849 3881  
3850 3882 __attribute__ (( unused ))
3851 3883 static void init_proc_7455 (CPUPPCState *env)
... ... @@ -3955,6 +3987,7 @@ static void init_proc_7455 (CPUPPCState *env)
3955 3987 //#define POWERPC_EXCP_970 (POWERPC_EXCP_970)
3956 3988 #define POWERPC_INPUT_970 (PPC_FLAGS_INPUT_970)
3957 3989 #define POWERPC_BFDM_970 (bfd_mach_ppc64)
  3990 +#define POWERPC_FLAG_970 (POWERPC_FLAG_VRE)
3958 3991  
3959 3992 static void init_proc_970 (CPUPPCState *env)
3960 3993 {
... ... @@ -4025,6 +4058,7 @@ static void init_proc_970 (CPUPPCState *env)
4025 4058 #define POWERPC_EXCP_970FX (POWERPC_EXCP_970)
4026 4059 #define POWERPC_INPUT_970FX (PPC_FLAGS_INPUT_970)
4027 4060 #define POWERPC_BFDM_970FX (bfd_mach_ppc64)
  4061 +#define POWERPC_FLAG_970FX (POWERPC_FLAG_VRE)
4028 4062  
4029 4063 static void init_proc_970FX (CPUPPCState *env)
4030 4064 {
... ... @@ -4095,6 +4129,7 @@ static void init_proc_970FX (CPUPPCState *env)
4095 4129 #define POWERPC_EXCP_970GX (POWERPC_EXCP_970)
4096 4130 #define POWERPC_INPUT_970GX (PPC_FLAGS_INPUT_970)
4097 4131 #define POWERPC_BFDM_970GX (bfd_mach_ppc64)
  4132 +#define POWERPC_FLAG_970GX (POWERPC_FLAG_VRE)
4098 4133  
4099 4134 static void init_proc_970GX (CPUPPCState *env)
4100 4135 {
... ... @@ -4164,6 +4199,7 @@ static void init_proc_970GX (CPUPPCState *env)
4164 4199 #define POWERPC_EXCP_620 (POWERPC_EXCP_970)
4165 4200 #define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_970)
4166 4201 #define POWERPC_BFDM_620 (bfd_mach_ppc64)
  4202 +#define POWERPC_FLAG_620 (POWERPC_FLAG_NONE)
4167 4203  
4168 4204 __attribute__ (( unused ))
4169 4205 static void init_proc_620 (CPUPPCState *env)
... ... @@ -4197,6 +4233,7 @@ static void init_proc_620 (CPUPPCState *env)
4197 4233 #define POWERPC_INPUT_PPC32 POWERPC_INPUT_604
4198 4234 #define init_proc_PPC32 init_proc_604
4199 4235 #define POWERPC_BFDM_PPC32 POWERPC_BFDM_604
  4236 +#define POWERPC_FLAG_PPC32 POWERPC_FLAG_604
4200 4237  
4201 4238 /* Default 64 bits PowerPC target will be 970 FX */
4202 4239 #define CPU_POWERPC_PPC64 CPU_POWERPC_970FX
... ... @@ -4207,6 +4244,7 @@ static void init_proc_620 (CPUPPCState *env)
4207 4244 #define POWERPC_INPUT_PPC64 POWERPC_INPUT_970FX
4208 4245 #define init_proc_PPC64 init_proc_970FX
4209 4246 #define POWERPC_BFDM_PPC64 POWERPC_BFDM_970FX
  4247 +#define POWERPC_FLAG_PPC64 POWERPC_FLAG_970FX
4210 4248  
4211 4249 /* Default PowerPC target will be PowerPC 32 */
4212 4250 #if defined (TARGET_PPC64) && 0 // XXX: TODO
... ... @@ -4218,6 +4256,7 @@ static void init_proc_620 (CPUPPCState *env)
4218 4256 #define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC64
4219 4257 #define init_proc_DEFAULT init_proc_PPC64
4220 4258 #define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC64
  4259 +#define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC64
4221 4260 #else
4222 4261 #define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC32
4223 4262 #define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32
... ... @@ -4227,6 +4266,7 @@ static void init_proc_620 (CPUPPCState *env)
4227 4266 #define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC32
4228 4267 #define init_proc_DEFAULT init_proc_PPC32
4229 4268 #define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC32
  4269 +#define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC32
4230 4270 #endif
4231 4271  
4232 4272 /*****************************************************************************/
... ... @@ -4724,6 +4764,7 @@ enum {
4724 4764 .excp_model = glue(POWERPC_EXCP_,_type), \
4725 4765 .bus_model = glue(POWERPC_INPUT_,_type), \
4726 4766 .bfd_mach = glue(POWERPC_BFDM_,_type), \
  4767 + .flags = glue(POWERPC_FLAG_,_type), \
4727 4768 .init_proc = &glue(init_proc_,_type), \
4728 4769 }
4729 4770  
... ... @@ -6016,6 +6057,7 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
6016 6057 env->mmu_model = def->mmu_model;
6017 6058 env->excp_model = def->excp_model;
6018 6059 env->bus_model = def->bus_model;
  6060 + env->flags = def->flags;
6019 6061 env->bfd_mach = def->bfd_mach;
6020 6062 if (create_ppc_opcodes(env, def) < 0)
6021 6063 return -1;
... ...