Commit d26968ecd8c93334f2793749c5c33c00d1c12d63
1 parent
b2437bf2
Remove unnecessary helper arguments, and fix some typos.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162
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3 changed files
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31 additions
and
21 deletions
target-mips/helper.h
| @@ -251,12 +251,12 @@ DEF_HELPER(void, do_pmon, (int function)) | @@ -251,12 +251,12 @@ DEF_HELPER(void, do_pmon, (int function)) | ||
| 251 | DEF_HELPER(void, do_wait, (void)) | 251 | DEF_HELPER(void, do_wait, (void)) |
| 252 | 252 | ||
| 253 | /* Bitfield operations. */ | 253 | /* Bitfield operations. */ |
| 254 | -DEF_HELPER(target_ulong, do_ext, (target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size)) | 254 | +DEF_HELPER(target_ulong, do_ext, (target_ulong t1, uint32_t pos, uint32_t size)) |
| 255 | DEF_HELPER(target_ulong, do_ins, (target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size)) | 255 | DEF_HELPER(target_ulong, do_ins, (target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size)) |
| 256 | -DEF_HELPER(target_ulong, do_wsbh, (target_ulong t0, target_ulong t1)) | 256 | +DEF_HELPER(target_ulong, do_wsbh, (target_ulong t1)) |
| 257 | #ifdef TARGET_MIPS64 | 257 | #ifdef TARGET_MIPS64 |
| 258 | -DEF_HELPER(target_ulong, do_dext, (target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size)) | 258 | +DEF_HELPER(target_ulong, do_dext, (target_ulong t1, uint32_t pos, uint32_t size)) |
| 259 | DEF_HELPER(target_ulong, do_dins, (target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size)) | 259 | DEF_HELPER(target_ulong, do_dins, (target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size)) |
| 260 | -DEF_HELPER(target_ulong, do_dsbh, (target_ulong t0, target_ulong t1)) | ||
| 261 | -DEF_HELPER(target_ulong, do_dshd, (target_ulong t0, target_ulong t1)) | 260 | +DEF_HELPER(target_ulong, do_dsbh, (target_ulong t1)) |
| 261 | +DEF_HELPER(target_ulong, do_dshd, (target_ulong t1)) | ||
| 262 | #endif | 262 | #endif |
target-mips/op_helper.c
| @@ -1867,7 +1867,7 @@ target_ulong do_rdhwr_ccres(void) | @@ -1867,7 +1867,7 @@ target_ulong do_rdhwr_ccres(void) | ||
| 1867 | } | 1867 | } |
| 1868 | 1868 | ||
| 1869 | /* Bitfield operations. */ | 1869 | /* Bitfield operations. */ |
| 1870 | -target_ulong do_ext(target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size) | 1870 | +target_ulong do_ext(target_ulong t1, uint32_t pos, uint32_t size) |
| 1871 | { | 1871 | { |
| 1872 | return (int32_t)((t1 >> pos) & ((size < 32) ? ((1 << size) - 1) : ~0)); | 1872 | return (int32_t)((t1 >> pos) & ((size < 32) ? ((1 << size) - 1) : ~0)); |
| 1873 | } | 1873 | } |
| @@ -1879,13 +1879,13 @@ target_ulong do_ins(target_ulong t0, target_ulong t1, uint32_t pos, uint32_t siz | @@ -1879,13 +1879,13 @@ target_ulong do_ins(target_ulong t0, target_ulong t1, uint32_t pos, uint32_t siz | ||
| 1879 | return (int32_t)((t0 & ~mask) | ((t1 << pos) & mask)); | 1879 | return (int32_t)((t0 & ~mask) | ((t1 << pos) & mask)); |
| 1880 | } | 1880 | } |
| 1881 | 1881 | ||
| 1882 | -target_ulong do_wsbh(target_ulong t0, target_ulong t1) | 1882 | +target_ulong do_wsbh(target_ulong t1) |
| 1883 | { | 1883 | { |
| 1884 | return (int32_t)(((t1 << 8) & ~0x00FF00FF) | ((t1 >> 8) & 0x00FF00FF)); | 1884 | return (int32_t)(((t1 << 8) & ~0x00FF00FF) | ((t1 >> 8) & 0x00FF00FF)); |
| 1885 | } | 1885 | } |
| 1886 | 1886 | ||
| 1887 | #if defined(TARGET_MIPS64) | 1887 | #if defined(TARGET_MIPS64) |
| 1888 | -target_ulong do_dext(target_ulong t0, target_ulong t1, uint32_t pos, uint32_t size) | 1888 | +target_ulong do_dext(target_ulong t1, uint32_t pos, uint32_t size) |
| 1889 | { | 1889 | { |
| 1890 | return (t1 >> pos) & ((size < 64) ? ((1ULL << size) - 1) : ~0ULL); | 1890 | return (t1 >> pos) & ((size < 64) ? ((1ULL << size) - 1) : ~0ULL); |
| 1891 | } | 1891 | } |
| @@ -1897,12 +1897,12 @@ target_ulong do_dins(target_ulong t0, target_ulong t1, uint32_t pos, uint32_t si | @@ -1897,12 +1897,12 @@ target_ulong do_dins(target_ulong t0, target_ulong t1, uint32_t pos, uint32_t si | ||
| 1897 | return (t0 & ~mask) | ((t1 << pos) & mask); | 1897 | return (t0 & ~mask) | ((t1 << pos) & mask); |
| 1898 | } | 1898 | } |
| 1899 | 1899 | ||
| 1900 | -target_ulong do_dsbh(target_ulong t0, target_ulong t1) | 1900 | +target_ulong do_dsbh(target_ulong t1) |
| 1901 | { | 1901 | { |
| 1902 | return ((t1 << 8) & ~0x00FF00FF00FF00FFULL) | ((t1 >> 8) & 0x00FF00FF00FF00FFULL); | 1902 | return ((t1 << 8) & ~0x00FF00FF00FF00FFULL) | ((t1 >> 8) & 0x00FF00FF00FF00FFULL); |
| 1903 | } | 1903 | } |
| 1904 | 1904 | ||
| 1905 | -target_ulong do_dshd(target_ulong t0, target_ulong t1) | 1905 | +target_ulong do_dshd(target_ulong t1) |
| 1906 | { | 1906 | { |
| 1907 | t1 = ((t1 << 16) & ~0x0000FFFF0000FFFFULL) | ((t1 >> 16) & 0x0000FFFF0000FFFFULL); | 1907 | t1 = ((t1 << 16) & ~0x0000FFFF0000FFFFULL) | ((t1 >> 16) & 0x0000FFFF0000FFFFULL); |
| 1908 | return (t1 << 32) | (t1 >> 32); | 1908 | return (t1 << 32) | (t1 >> 32); |
target-mips/translate.c
| @@ -464,12 +464,12 @@ static inline void tcg_gen_helper_0_2i(void *func, TCGv arg1, TCGv arg2, TCGv ar | @@ -464,12 +464,12 @@ static inline void tcg_gen_helper_0_2i(void *func, TCGv arg1, TCGv arg2, TCGv ar | ||
| 464 | tcg_temp_free(tmp); | 464 | tcg_temp_free(tmp); |
| 465 | } | 465 | } |
| 466 | 466 | ||
| 467 | -static inline void tcg_gen_helper_0_2ii(void *func, TCGv arg1, TCGv arg2, TCGv arg3, TCGv arg4) | 467 | +static inline void tcg_gen_helper_0_1ii(void *func, TCGv arg1, TCGv arg2, TCGv arg3) |
| 468 | { | 468 | { |
| 469 | - TCGv tmp1 = tcg_const_i32(arg3); | 469 | + TCGv tmp1 = tcg_const_i32(arg2); |
| 470 | TCGv tmp2 = tcg_const_i32(arg3); | 470 | TCGv tmp2 = tcg_const_i32(arg3); |
| 471 | 471 | ||
| 472 | - tcg_gen_helper_0_4(func, arg1, arg2, tmp1, tmp2); | 472 | + tcg_gen_helper_0_3(func, arg1, tmp1, tmp2); |
| 473 | tcg_temp_free(tmp1); | 473 | tcg_temp_free(tmp1); |
| 474 | tcg_temp_free(tmp2); | 474 | tcg_temp_free(tmp2); |
| 475 | } | 475 | } |
| @@ -490,6 +490,16 @@ static inline void tcg_gen_helper_1_1i(void *func, TCGv ret, TCGv arg1, TCGv arg | @@ -490,6 +490,16 @@ static inline void tcg_gen_helper_1_1i(void *func, TCGv ret, TCGv arg1, TCGv arg | ||
| 490 | tcg_temp_free(tmp); | 490 | tcg_temp_free(tmp); |
| 491 | } | 491 | } |
| 492 | 492 | ||
| 493 | +static inline void tcg_gen_helper_1_1ii(void *func, TCGv ret, TCGv arg1, TCGv arg2, TCGv arg3) | ||
| 494 | +{ | ||
| 495 | + TCGv tmp1 = tcg_const_i32(arg2); | ||
| 496 | + TCGv tmp2 = tcg_const_i32(arg3); | ||
| 497 | + | ||
| 498 | + tcg_gen_helper_1_3(func, ret, arg1, tmp1, tmp2); | ||
| 499 | + tcg_temp_free(tmp1); | ||
| 500 | + tcg_temp_free(tmp2); | ||
| 501 | +} | ||
| 502 | + | ||
| 493 | static inline void tcg_gen_helper_1_2i(void *func, TCGv ret, TCGv arg1, TCGv arg2, TCGv arg3) | 503 | static inline void tcg_gen_helper_1_2i(void *func, TCGv ret, TCGv arg1, TCGv arg2, TCGv arg3) |
| 494 | { | 504 | { |
| 495 | TCGv tmp = tcg_const_i32(arg3); | 505 | TCGv tmp = tcg_const_i32(arg3); |
| @@ -501,7 +511,7 @@ static inline void tcg_gen_helper_1_2i(void *func, TCGv ret, TCGv arg1, TCGv arg | @@ -501,7 +511,7 @@ static inline void tcg_gen_helper_1_2i(void *func, TCGv ret, TCGv arg1, TCGv arg | ||
| 501 | static inline void tcg_gen_helper_1_2ii(void *func, TCGv ret, TCGv arg1, TCGv arg2, TCGv arg3, TCGv arg4) | 511 | static inline void tcg_gen_helper_1_2ii(void *func, TCGv ret, TCGv arg1, TCGv arg2, TCGv arg3, TCGv arg4) |
| 502 | { | 512 | { |
| 503 | TCGv tmp1 = tcg_const_i32(arg3); | 513 | TCGv tmp1 = tcg_const_i32(arg3); |
| 504 | - TCGv tmp2 = tcg_const_i32(arg3); | 514 | + TCGv tmp2 = tcg_const_i32(arg4); |
| 505 | 515 | ||
| 506 | tcg_gen_helper_1_4(func, ret, arg1, arg2, tmp1, tmp2); | 516 | tcg_gen_helper_1_4(func, ret, arg1, arg2, tmp1, tmp2); |
| 507 | tcg_temp_free(tmp1); | 517 | tcg_temp_free(tmp1); |
| @@ -2748,23 +2758,23 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt, | @@ -2748,23 +2758,23 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt, | ||
| 2748 | case OPC_EXT: | 2758 | case OPC_EXT: |
| 2749 | if (lsb + msb > 31) | 2759 | if (lsb + msb > 31) |
| 2750 | goto fail; | 2760 | goto fail; |
| 2751 | - tcg_gen_helper_1_2ii(do_ext, t0, t0, t1, lsb, msb + 1); | 2761 | + tcg_gen_helper_1_1ii(do_ext, t0, t1, lsb, msb + 1); |
| 2752 | break; | 2762 | break; |
| 2753 | #if defined(TARGET_MIPS64) | 2763 | #if defined(TARGET_MIPS64) |
| 2754 | case OPC_DEXTM: | 2764 | case OPC_DEXTM: |
| 2755 | if (lsb + msb > 63) | 2765 | if (lsb + msb > 63) |
| 2756 | goto fail; | 2766 | goto fail; |
| 2757 | - tcg_gen_helper_1_2ii(do_dext, t0, t0, t1, lsb, msb + 1 + 32); | 2767 | + tcg_gen_helper_1_1ii(do_dext, t0, t1, lsb, msb + 1 + 32); |
| 2758 | break; | 2768 | break; |
| 2759 | case OPC_DEXTU: | 2769 | case OPC_DEXTU: |
| 2760 | if (lsb + msb > 63) | 2770 | if (lsb + msb > 63) |
| 2761 | goto fail; | 2771 | goto fail; |
| 2762 | - tcg_gen_helper_1_2ii(do_dext, t0, t0, t1, lsb + 32, msb + 1); | 2772 | + tcg_gen_helper_1_1ii(do_dext, t0, t1, lsb + 32, msb + 1); |
| 2763 | break; | 2773 | break; |
| 2764 | case OPC_DEXT: | 2774 | case OPC_DEXT: |
| 2765 | if (lsb + msb > 63) | 2775 | if (lsb + msb > 63) |
| 2766 | goto fail; | 2776 | goto fail; |
| 2767 | - tcg_gen_helper_1_2ii(do_dext, t0, t0, t1, lsb, msb + 1); | 2777 | + tcg_gen_helper_1_1ii(do_dext, t0, t1, lsb, msb + 1); |
| 2768 | break; | 2778 | break; |
| 2769 | #endif | 2779 | #endif |
| 2770 | case OPC_INS: | 2780 | case OPC_INS: |
| @@ -7388,7 +7398,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) | @@ -7388,7 +7398,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) | ||
| 7388 | switch (op2) { | 7398 | switch (op2) { |
| 7389 | case OPC_WSBH: | 7399 | case OPC_WSBH: |
| 7390 | gen_load_gpr(t1, rt); | 7400 | gen_load_gpr(t1, rt); |
| 7391 | - tcg_gen_helper_1_2(do_wsbh, t0, t0, t1); | 7401 | + tcg_gen_helper_1_1(do_wsbh, t0, t1); |
| 7392 | gen_store_gpr(t0, rd); | 7402 | gen_store_gpr(t0, rd); |
| 7393 | break; | 7403 | break; |
| 7394 | case OPC_SEB: | 7404 | case OPC_SEB: |
| @@ -7490,11 +7500,11 @@ static void decode_opc (CPUState *env, DisasContext *ctx) | @@ -7490,11 +7500,11 @@ static void decode_opc (CPUState *env, DisasContext *ctx) | ||
| 7490 | switch (op2) { | 7500 | switch (op2) { |
| 7491 | case OPC_DSBH: | 7501 | case OPC_DSBH: |
| 7492 | gen_load_gpr(t1, rt); | 7502 | gen_load_gpr(t1, rt); |
| 7493 | - tcg_gen_helper_1_2(do_dsbh, t0, t0, t1); | 7503 | + tcg_gen_helper_1_1(do_dsbh, t0, t1); |
| 7494 | break; | 7504 | break; |
| 7495 | case OPC_DSHD: | 7505 | case OPC_DSHD: |
| 7496 | gen_load_gpr(t1, rt); | 7506 | gen_load_gpr(t1, rt); |
| 7497 | - tcg_gen_helper_1_2(do_dshd, t0, t0, t1); | 7507 | + tcg_gen_helper_1_1(do_dshd, t0, t1); |
| 7498 | break; | 7508 | break; |
| 7499 | default: /* Invalid */ | 7509 | default: /* Invalid */ |
| 7500 | MIPS_INVAL("dbshfl"); | 7510 | MIPS_INVAL("dbshfl"); |