gwj / at91sam9263 · Commits

Commit d2604285b26501435286d7d2933d9017920794d6

Authored by aurel32
1 parent f31e9370

Implement TCG not ops for x86-64 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6797 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 4 changed files with 26 additions and 0 deletions
tcg/tcg-op.h
  View file @d260428
@@ -1425,12 +1425,20 @@ static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg) @@ -1425,12 +1425,20 @@ static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
1425 1425
1426 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg) 1426 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
1427 { 1427 {
  1428 +#ifdef TCG_TARGET_HAS_not_i32
  1429 + tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
  1430 +#else
1428 tcg_gen_xori_i32(ret, arg, -1); 1431 tcg_gen_xori_i32(ret, arg, -1);
  1432 +#endif
1429 } 1433 }
1430 1434
1431 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg) 1435 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
1432 { 1436 {
  1437 +#ifdef TCG_TARGET_HAS_not_i64
  1438 + tcg_gen_op2_i32(INDEX_op_not_i64, ret, arg);
  1439 +#else
1433 tcg_gen_xori_i64(ret, arg, -1); 1440 tcg_gen_xori_i64(ret, arg, -1);
  1441 +#endif
1434 } 1442 }
1435 1443
1436 static inline void tcg_gen_discard_i32(TCGv_i32 arg) 1444 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
tcg/tcg-opc.h
  View file @d260428
@@ -147,6 +147,12 @@ DEF2(ext32s_i64, 1, 1, 0, 0) @@ -147,6 +147,12 @@ DEF2(ext32s_i64, 1, 1, 0, 0)
147 DEF2(bswap_i64, 1, 1, 0, 0) 147 DEF2(bswap_i64, 1, 1, 0, 0)
148 #endif 148 #endif
149 #endif 149 #endif
  150 +#ifdef TCG_TARGET_HAS_not_i32
  151 +DEF2(not_i32, 1, 1, 0, 0)
  152 +#endif
  153 +#ifdef TCG_TARGET_HAS_not_i64
  154 +DEF2(not_i64, 1, 1, 0, 0)
  155 +#endif
150 #ifdef TCG_TARGET_HAS_neg_i32 156 #ifdef TCG_TARGET_HAS_neg_i32
151 DEF2(neg_i32, 1, 1, 0, 0) 157 DEF2(neg_i32, 1, 1, 0, 0)
152 #endif 158 #endif
tcg/x86_64/tcg-target.c
  View file @d260428
@@ -1108,6 +1108,13 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, @@ -1108,6 +1108,13 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
1108 tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]); 1108 tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]);
1109 break; 1109 break;
1110 1110
  1111 + case INDEX_op_not_i32:
  1112 + tcg_out_modrm(s, 0xf7, 2, args[0]);
  1113 + break;
  1114 + case INDEX_op_not_i64:
  1115 + tcg_out_modrm(s, 0xf7 | P_REXW, 2, args[0]);
  1116 + break;
  1117 +
1111 case INDEX_op_ext8s_i32: 1118 case INDEX_op_ext8s_i32:
1112 tcg_out_modrm(s, 0xbe | P_EXT | P_REXB, args[0], args[1]); 1119 tcg_out_modrm(s, 0xbe | P_EXT | P_REXB, args[0], args[1]);
1113 break; 1120 break;
@@ -1286,6 +1293,9 @@ static const TCGTargetOpDef x86_64_op_defs[] = { @@ -1286,6 +1293,9 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
1286 { INDEX_op_neg_i32, { "r", "0" } }, 1293 { INDEX_op_neg_i32, { "r", "0" } },
1287 { INDEX_op_neg_i64, { "r", "0" } }, 1294 { INDEX_op_neg_i64, { "r", "0" } },
1288 1295
  1296 + { INDEX_op_not_i32, { "r", "0" } },
  1297 + { INDEX_op_not_i64, { "r", "0" } },
  1298 +
1289 { INDEX_op_ext8s_i32, { "r", "r"} }, 1299 { INDEX_op_ext8s_i32, { "r", "r"} },
1290 { INDEX_op_ext16s_i32, { "r", "r"} }, 1300 { INDEX_op_ext16s_i32, { "r", "r"} },
1291 { INDEX_op_ext8s_i64, { "r", "r"} }, 1301 { INDEX_op_ext8s_i64, { "r", "r"} },
tcg/x86_64/tcg-target.h
  View file @d260428
@@ -60,6 +60,8 @@ enum { @@ -60,6 +60,8 @@ enum {
60 #define TCG_TARGET_HAS_bswap_i64 60 #define TCG_TARGET_HAS_bswap_i64
61 #define TCG_TARGET_HAS_neg_i32 61 #define TCG_TARGET_HAS_neg_i32
62 #define TCG_TARGET_HAS_neg_i64 62 #define TCG_TARGET_HAS_neg_i64
  63 +#define TCG_TARGET_HAS_not_i32
  64 +#define TCG_TARGET_HAS_not_i64
63 #define TCG_TARGET_HAS_ext8s_i32 65 #define TCG_TARGET_HAS_ext8s_i32
64 #define TCG_TARGET_HAS_ext16s_i32 66 #define TCG_TARGET_HAS_ext16s_i32
65 #define TCG_TARGET_HAS_ext8s_i64 67 #define TCG_TARGET_HAS_ext8s_i64