Commit d0f3654f8346ac32953b3ca4bb3dce5e63517ab7
1 parent
6b2fce90
microblaze: Make writes to MMU_ZPR flush the TLB.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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target-microblaze/mmu.c
... | ... | @@ -220,6 +220,13 @@ void mmu_write(CPUState *env, uint32_t rn, uint32_t v) |
220 | 220 | D(qemu_log("%s ram[%d][%d]=%x\n", __func__, rn & 1, i, v)); |
221 | 221 | break; |
222 | 222 | case MMU_R_ZPR: |
223 | + /* Changes to the zone protection reg flush the QEMU TLB. | |
224 | + Fortunately, these are very uncommon. */ | |
225 | + if (v != env->mmu.regs[rn]) { | |
226 | + tlb_flush(env, 1); | |
227 | + } | |
228 | + env->mmu.regs[rn] = v; | |
229 | + break; | |
223 | 230 | case MMU_R_PID: |
224 | 231 | if (v != env->mmu.regs[rn]) { |
225 | 232 | mmu_change_pid(env, v); | ... | ... |