Commit d0dc7dc3274a88db1c9941614454ed842d62cf91

Authored by ths
1 parent 577d8dd4

Make MIPS MT implementation more cache friendly.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
gdbstub.c
... ... @@ -610,17 +610,17 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
610 610 ptr = mem_buf;
611 611 for (i = 0; i < 32; i++)
612 612 {
613   - *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
  613 + *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
614 614 ptr += sizeof(target_ulong);
615 615 }
616 616  
617 617 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
618 618 ptr += sizeof(target_ulong);
619 619  
620   - *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
  620 + *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
621 621 ptr += sizeof(target_ulong);
622 622  
623   - *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
  623 + *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
624 624 ptr += sizeof(target_ulong);
625 625  
626 626 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
... ... @@ -687,17 +687,17 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
687 687 ptr = mem_buf;
688 688 for (i = 0; i < 32; i++)
689 689 {
690   - env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
  690 + env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
691 691 ptr += sizeof(target_ulong);
692 692 }
693 693  
694 694 env->CP0_Status = tswapl(*(target_ulong *)ptr);
695 695 ptr += sizeof(target_ulong);
696 696  
697   - env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
  697 + env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
698 698 ptr += sizeof(target_ulong);
699 699  
700   - env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
  700 + env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
701 701 ptr += sizeof(target_ulong);
702 702  
703 703 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
... ...
linux-user/main.c
... ... @@ -1522,7 +1522,7 @@ void cpu_loop(CPUMIPSState *env)
1522 1522 trapnr = cpu_mips_exec(env);
1523 1523 switch(trapnr) {
1524 1524 case EXCP_SYSCALL:
1525   - syscall_num = env->gpr[2][env->current_tc] - 4000;
  1525 + syscall_num = env->gpr[env->current_tc][2] - 4000;
1526 1526 env->PC[env->current_tc] += 4;
1527 1527 if (syscall_num >= sizeof(mips_syscall_args)) {
1528 1528 ret = -ENOSYS;
... ... @@ -1532,7 +1532,7 @@ void cpu_loop(CPUMIPSState *env)
1532 1532 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1533 1533  
1534 1534 nb_args = mips_syscall_args[syscall_num];
1535   - sp_reg = env->gpr[29][env->current_tc];
  1535 + sp_reg = env->gpr[env->current_tc][29];
1536 1536 switch (nb_args) {
1537 1537 /* these arguments are taken from the stack */
1538 1538 /* FIXME - what to do if get_user() fails? */
... ... @@ -1543,20 +1543,20 @@ void cpu_loop(CPUMIPSState *env)
1543 1543 default:
1544 1544 break;
1545 1545 }
1546   - ret = do_syscall(env, env->gpr[2][env->current_tc],
1547   - env->gpr[4][env->current_tc],
1548   - env->gpr[5][env->current_tc],
1549   - env->gpr[6][env->current_tc],
1550   - env->gpr[7][env->current_tc],
  1546 + ret = do_syscall(env, env->gpr[env->current_tc][2],
  1547 + env->gpr[env->current_tc][4],
  1548 + env->gpr[env->current_tc][5],
  1549 + env->gpr[env->current_tc][6],
  1550 + env->gpr[env->current_tc][7],
1551 1551 arg5, arg6/*, arg7, arg8*/);
1552 1552 }
1553 1553 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1554   - env->gpr[7][env->current_tc] = 1; /* error flag */
  1554 + env->gpr[env->current_tc][7] = 1; /* error flag */
1555 1555 ret = -ret;
1556 1556 } else {
1557   - env->gpr[7][env->current_tc] = 0; /* error flag */
  1557 + env->gpr[env->current_tc][7] = 0; /* error flag */
1558 1558 }
1559   - env->gpr[2][env->current_tc] = ret;
  1559 + env->gpr[env->current_tc][2] = ret;
1560 1560 break;
1561 1561 case EXCP_TLBL:
1562 1562 case EXCP_TLBS:
... ... @@ -2296,7 +2296,7 @@ int main(int argc, char **argv)
2296 2296 int i;
2297 2297  
2298 2298 for(i = 0; i < 32; i++) {
2299   - env->gpr[i][env->current_tc] = regs->regs[i];
  2299 + env->gpr[env->current_tc][i] = regs->regs[i];
2300 2300 }
2301 2301 env->PC[env->current_tc] = regs->cp0_epc;
2302 2302 }
... ...
linux-user/mips/target_signal.h
... ... @@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
23 23  
24 24 static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)
25 25 {
26   - return state->gpr[29][state->current_tc];
  26 + return state->gpr[state->current_tc][29];
27 27 }
28 28  
29 29 #endif /* TARGET_SIGNAL_H */
... ...
linux-user/mips64/target_signal.h
... ... @@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
23 23  
24 24 static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)
25 25 {
26   - return state->gpr[29][state->current_tc];
  26 + return state->gpr[state->current_tc][29];
27 27 }
28 28  
29 29 #endif /* TARGET_SIGNAL_H */
... ...
linux-user/mipsn32/target_signal.h
... ... @@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
23 23  
24 24 static inline target_ulong get_sp_from_cpustate(CPUMIPSState *state)
25 25 {
26   - return state->gpr[29][state->current_tc];
  26 + return state->gpr[state->current_tc][29];
27 27 }
28 28  
29 29 #endif /* TARGET_SIGNAL_H */
... ...
linux-user/signal.c
... ... @@ -2131,7 +2131,7 @@ setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
2131 2131 err |= __put_user(regs->PC[regs->current_tc], &sc->sc_pc);
2132 2132  
2133 2133 #define save_gp_reg(i) do { \
2134   - err |= __put_user(regs->gpr[i][regs->current_tc], &sc->sc_regs[i]); \
  2134 + err |= __put_user(regs->gpr[regs->current_tc][i], &sc->sc_regs[i]); \
2135 2135 } while(0)
2136 2136 __put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
2137 2137 save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
... ... @@ -2144,8 +2144,8 @@ setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
2144 2144 save_gp_reg(31);
2145 2145 #undef save_gp_reg
2146 2146  
2147   - err |= __put_user(regs->HI[0][regs->current_tc], &sc->sc_mdhi);
2148   - err |= __put_user(regs->LO[0][regs->current_tc], &sc->sc_mdlo);
  2147 + err |= __put_user(regs->HI[regs->current_tc][0], &sc->sc_mdhi);
  2148 + err |= __put_user(regs->LO[regs->current_tc][0], &sc->sc_mdlo);
2149 2149  
2150 2150 /* Not used yet, but might be useful if we ever have DSP suppport */
2151 2151 #if 0
... ... @@ -2205,11 +2205,11 @@ restore_sigcontext(CPUState *regs, struct target_sigcontext *sc)
2205 2205  
2206 2206 err |= __get_user(regs->CP0_EPC, &sc->sc_pc);
2207 2207  
2208   - err |= __get_user(regs->HI[0][regs->current_tc], &sc->sc_mdhi);
2209   - err |= __get_user(regs->LO[0][regs->current_tc], &sc->sc_mdlo);
  2208 + err |= __get_user(regs->HI[regs->current_tc][0], &sc->sc_mdhi);
  2209 + err |= __get_user(regs->LO[regs->current_tc][0], &sc->sc_mdlo);
2210 2210  
2211 2211 #define restore_gp_reg(i) do { \
2212   - err |= __get_user(regs->gpr[i][regs->current_tc], &sc->sc_regs[i]); \
  2212 + err |= __get_user(regs->gpr[regs->current_tc][i], &sc->sc_regs[i]); \
2213 2213 } while(0)
2214 2214 restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
2215 2215 restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
... ... @@ -2275,7 +2275,7 @@ get_sigframe(struct emulated_sigaction *ka, CPUState *regs, size_t frame_size)
2275 2275 unsigned long sp;
2276 2276  
2277 2277 /* Default to using normal stack */
2278   - sp = regs->gpr[29][regs->current_tc];
  2278 + sp = regs->gpr[regs->current_tc][29];
2279 2279  
2280 2280 /*
2281 2281 * FPU emulator may have it's own trampoline active just
... ... @@ -2324,15 +2324,15 @@ static void setup_frame(int sig, struct emulated_sigaction * ka,
2324 2324 * $25 and PC point to the signal handler, $29 points to the
2325 2325 * struct sigframe.
2326 2326 */
2327   - regs->gpr[ 4][regs->current_tc] = sig;
2328   - regs->gpr[ 5][regs->current_tc] = 0;
2329   - regs->gpr[ 6][regs->current_tc] = frame_addr + offsetof(struct sigframe, sf_sc);
2330   - regs->gpr[29][regs->current_tc] = frame_addr;
2331   - regs->gpr[31][regs->current_tc] = frame_addr + offsetof(struct sigframe, sf_code);
  2327 + regs->gpr[regs->current_tc][ 4] = sig;
  2328 + regs->gpr[regs->current_tc][ 5] = 0;
  2329 + regs->gpr[regs->current_tc][ 6] = frame_addr + offsetof(struct sigframe, sf_sc);
  2330 + regs->gpr[regs->current_tc][29] = frame_addr;
  2331 + regs->gpr[regs->current_tc][31] = frame_addr + offsetof(struct sigframe, sf_code);
2332 2332 /* The original kernel code sets CP0_EPC to the handler
2333 2333 * since it returns to userland using eret
2334 2334 * we cannot do this here, and we must set PC directly */
2335   - regs->PC[regs->current_tc] = regs->gpr[25][regs->current_tc] = ka->sa._sa_handler;
  2335 + regs->PC[regs->current_tc] = regs->gpr[regs->current_tc][25] = ka->sa._sa_handler;
2336 2336 unlock_user_struct(frame, frame_addr, 1);
2337 2337 return;
2338 2338  
... ... @@ -2353,7 +2353,7 @@ long do_sigreturn(CPUState *regs)
2353 2353 #if defined(DEBUG_SIGNAL)
2354 2354 fprintf(stderr, "do_sigreturn\n");
2355 2355 #endif
2356   - frame_addr = regs->gpr[29][regs->current_tc];
  2356 + frame_addr = regs->gpr[regs->current_tc][29];
2357 2357 if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1))
2358 2358 goto badframe;
2359 2359  
... ...
linux-user/syscall.c
... ... @@ -2752,8 +2752,8 @@ int do_fork(CPUState *env, unsigned int flags, abi_ulong newsp)
2752 2752 /* ??? is this sufficient? */
2753 2753 #elif defined(TARGET_MIPS)
2754 2754 if (!newsp)
2755   - newsp = env->gpr[29][env->current_tc];
2756   - new_env->gpr[29][env->current_tc] = newsp;
  2755 + newsp = env->gpr[env->current_tc][29];
  2756 + new_env->gpr[env->current_tc][29] = newsp;
2757 2757 #elif defined(TARGET_PPC)
2758 2758 if (!newsp)
2759 2759 newsp = env->gpr[1];
... ... @@ -3512,7 +3512,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
3512 3512 if (!is_error(ret)) {
3513 3513 #if defined(TARGET_MIPS)
3514 3514 CPUMIPSState *env = (CPUMIPSState*)cpu_env;
3515   - env->gpr[3][env->current_tc] = host_pipe[1];
  3515 + env->gpr[env->current_tc][3] = host_pipe[1];
3516 3516 ret = host_pipe[0];
3517 3517 #else
3518 3518 if (put_user_s32(host_pipe[0], arg1)
... ...
target-mips/cpu.h
... ... @@ -142,7 +142,7 @@ typedef struct mips_def_t mips_def_t;
142 142 typedef struct CPUMIPSState CPUMIPSState;
143 143 struct CPUMIPSState {
144 144 /* General integer registers */
145   - target_ulong gpr[32][MIPS_SHADOW_SET_MAX];
  145 + target_ulong gpr[MIPS_SHADOW_SET_MAX][32];
146 146 /* Special registers */
147 147 target_ulong PC[MIPS_TC_MAX];
148 148 #if TARGET_LONG_BITS > HOST_LONG_BITS
... ... @@ -150,9 +150,9 @@ struct CPUMIPSState {
150 150 target_ulong t1;
151 151 target_ulong t2;
152 152 #endif
153   - target_ulong HI[MIPS_DSP_ACC][MIPS_TC_MAX];
154   - target_ulong LO[MIPS_DSP_ACC][MIPS_TC_MAX];
155   - target_ulong ACX[MIPS_DSP_ACC][MIPS_TC_MAX];
  153 + target_ulong HI[MIPS_TC_MAX][MIPS_DSP_ACC];
  154 + target_ulong LO[MIPS_TC_MAX][MIPS_DSP_ACC];
  155 + target_ulong ACX[MIPS_TC_MAX][MIPS_DSP_ACC];
156 156 target_ulong DSPControl[MIPS_TC_MAX];
157 157  
158 158 CPUMIPSMVPContext *mvp;
... ...
target-mips/op.c
... ... @@ -255,25 +255,25 @@ void op_dup_T0 (void)
255 255  
256 256 void op_load_HI (void)
257 257 {
258   - T0 = env->HI[PARAM1][env->current_tc];
  258 + T0 = env->HI[env->current_tc][PARAM1];
259 259 FORCE_RET();
260 260 }
261 261  
262 262 void op_store_HI (void)
263 263 {
264   - env->HI[PARAM1][env->current_tc] = T0;
  264 + env->HI[env->current_tc][PARAM1] = T0;
265 265 FORCE_RET();
266 266 }
267 267  
268 268 void op_load_LO (void)
269 269 {
270   - T0 = env->LO[PARAM1][env->current_tc];
  270 + T0 = env->LO[env->current_tc][PARAM1];
271 271 FORCE_RET();
272 272 }
273 273  
274 274 void op_store_LO (void)
275 275 {
276   - env->LO[PARAM1][env->current_tc] = T0;
  276 + env->LO[env->current_tc][PARAM1] = T0;
277 277 FORCE_RET();
278 278 }
279 279  
... ... @@ -368,8 +368,8 @@ void op_div (void)
368 368 void op_div (void)
369 369 {
370 370 if (T1 != 0) {
371   - env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
372   - env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
  371 + env->LO[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
  372 + env->HI[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
373 373 }
374 374 FORCE_RET();
375 375 }
... ... @@ -378,8 +378,8 @@ void op_div (void)
378 378 void op_divu (void)
379 379 {
380 380 if (T1 != 0) {
381   - env->LO[0][env->current_tc] = (int32_t)((uint32_t)T0 / (uint32_t)T1);
382   - env->HI[0][env->current_tc] = (int32_t)((uint32_t)T0 % (uint32_t)T1);
  381 + env->LO[env->current_tc][0] = (int32_t)((uint32_t)T0 / (uint32_t)T1);
  382 + env->HI[env->current_tc][0] = (int32_t)((uint32_t)T0 % (uint32_t)T1);
383 383 }
384 384 FORCE_RET();
385 385 }
... ... @@ -447,8 +447,8 @@ void op_ddivu (void)
447 447 void op_ddivu (void)
448 448 {
449 449 if (T1 != 0) {
450   - env->LO[0][env->current_tc] = T0 / T1;
451   - env->HI[0][env->current_tc] = T0 % T1;
  450 + env->LO[env->current_tc][0] = T0 / T1;
  451 + env->HI[env->current_tc][0] = T0 % T1;
452 452 }
453 453 FORCE_RET();
454 454 }
... ... @@ -869,26 +869,26 @@ void op_mulshiu (void)
869 869  
870 870 static always_inline uint64_t get_HILO (void)
871 871 {
872   - return ((uint64_t)env->HI[0][env->current_tc] << 32) |
873   - ((uint64_t)(uint32_t)env->LO[0][env->current_tc]);
  872 + return ((uint64_t)env->HI[env->current_tc][0] << 32) |
  873 + ((uint64_t)(uint32_t)env->LO[env->current_tc][0]);
874 874 }
875 875  
876 876 static always_inline void set_HILO (uint64_t HILO)
877 877 {
878   - env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
879   - env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
  878 + env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
  879 + env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
880 880 }
881 881  
882 882 static always_inline void set_HIT0_LO (uint64_t HILO)
883 883 {
884   - env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
885   - T0 = env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
  884 + env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
  885 + T0 = env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
886 886 }
887 887  
888 888 static always_inline void set_HI_LOT0 (uint64_t HILO)
889 889 {
890   - T0 = env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
891   - env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
  890 + T0 = env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
  891 + env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
892 892 }
893 893  
894 894 void op_mult (void)
... ... @@ -1029,13 +1029,13 @@ void op_mulshiu (void)
1029 1029 #if defined(TARGET_MIPS64)
1030 1030 void op_dmult (void)
1031 1031 {
1032   - CALL_FROM_TB4(muls64, &(env->LO[0][env->current_tc]), &(env->HI[0][env->current_tc]), T0, T1);
  1032 + CALL_FROM_TB4(muls64, &(env->LO[env->current_tc][0]), &(env->HI[env->current_tc][0]), T0, T1);
1033 1033 FORCE_RET();
1034 1034 }
1035 1035  
1036 1036 void op_dmultu (void)
1037 1037 {
1038   - CALL_FROM_TB4(mulu64, &(env->LO[0][env->current_tc]), &(env->HI[0][env->current_tc]), T0, T1);
  1038 + CALL_FROM_TB4(mulu64, &(env->LO[env->current_tc][0]), &(env->HI[env->current_tc][0]), T0, T1);
1039 1039 FORCE_RET();
1040 1040 }
1041 1041 #endif
... ... @@ -1044,14 +1044,14 @@ void op_dmultu (void)
1044 1044 void op_movn (void)
1045 1045 {
1046 1046 if (T1 != 0)
1047   - env->gpr[PARAM1][env->current_tc] = T0;
  1047 + env->gpr[env->current_tc][PARAM1] = T0;
1048 1048 FORCE_RET();
1049 1049 }
1050 1050  
1051 1051 void op_movz (void)
1052 1052 {
1053 1053 if (T1 == 0)
1054   - env->gpr[PARAM1][env->current_tc] = T0;
  1054 + env->gpr[env->current_tc][PARAM1] = T0;
1055 1055 FORCE_RET();
1056 1056 }
1057 1057  
... ...
target-mips/op_helper.c
... ... @@ -163,25 +163,25 @@ void do_dclz (void)
163 163 #if TARGET_LONG_BITS > HOST_LONG_BITS
164 164 static always_inline uint64_t get_HILO (void)
165 165 {
166   - return (env->HI[0][env->current_tc] << 32) | (uint32_t)env->LO[0][env->current_tc];
  166 + return (env->HI[env->current_tc][0] << 32) | (uint32_t)env->LO[env->current_tc][0];
167 167 }
168 168  
169 169 static always_inline void set_HILO (uint64_t HILO)
170 170 {
171   - env->LO[0][env->current_tc] = (int32_t)HILO;
172   - env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
  171 + env->LO[env->current_tc][0] = (int32_t)HILO;
  172 + env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
173 173 }
174 174  
175 175 static always_inline void set_HIT0_LO (uint64_t HILO)
176 176 {
177   - env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
178   - T0 = env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
  177 + env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
  178 + T0 = env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
179 179 }
180 180  
181 181 static always_inline void set_HI_LOT0 (uint64_t HILO)
182 182 {
183   - T0 = env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
184   - env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
  183 + T0 = env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
  184 + env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
185 185 }
186 186  
187 187 void do_mult (void)
... ... @@ -303,8 +303,8 @@ void do_div (void)
303 303 {
304 304 /* 64bit datatypes because we may see overflow/underflow. */
305 305 if (T1 != 0) {
306   - env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
307   - env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
  306 + env->LO[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
  307 + env->HI[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
308 308 }
309 309 }
310 310 #endif
... ... @@ -316,12 +316,12 @@ void do_ddiv (void)
316 316 int64_t arg0 = (int64_t)T0;
317 317 int64_t arg1 = (int64_t)T1;
318 318 if (arg0 == ((int64_t)-1 << 63) && arg1 == (int64_t)-1) {
319   - env->LO[0][env->current_tc] = arg0;
320   - env->HI[0][env->current_tc] = 0;
  319 + env->LO[env->current_tc][0] = arg0;
  320 + env->HI[env->current_tc][0] = 0;
321 321 } else {
322 322 lldiv_t res = lldiv(arg0, arg1);
323   - env->LO[0][env->current_tc] = res.quot;
324   - env->HI[0][env->current_tc] = res.rem;
  323 + env->LO[env->current_tc][0] = res.quot;
  324 + env->HI[env->current_tc][0] = res.rem;
325 325 }
326 326 }
327 327 }
... ... @@ -330,8 +330,8 @@ void do_ddiv (void)
330 330 void do_ddivu (void)
331 331 {
332 332 if (T1 != 0) {
333   - env->LO[0][env->current_tc] = T0 / T1;
334   - env->HI[0][env->current_tc] = T0 % T1;
  333 + env->LO[env->current_tc][0] = T0 / T1;
  334 + env->HI[env->current_tc][0] = T0 % T1;
335 335 }
336 336 }
337 337 #endif
... ... @@ -627,21 +627,21 @@ void do_pmon (int function)
627 627 function /= 2;
628 628 switch (function) {
629 629 case 2: /* TODO: char inbyte(int waitflag); */
630   - if (env->gpr[4][env->current_tc] == 0)
631   - env->gpr[2][env->current_tc] = -1;
  630 + if (env->gpr[env->current_tc][4] == 0)
  631 + env->gpr[env->current_tc][2] = -1;
632 632 /* Fall through */
633 633 case 11: /* TODO: char inbyte (void); */
634   - env->gpr[2][env->current_tc] = -1;
  634 + env->gpr[env->current_tc][2] = -1;
635 635 break;
636 636 case 3:
637 637 case 12:
638   - printf("%c", (char)(env->gpr[4][env->current_tc] & 0xFF));
  638 + printf("%c", (char)(env->gpr[env->current_tc][4] & 0xFF));
639 639 break;
640 640 case 17:
641 641 break;
642 642 case 158:
643 643 {
644   - unsigned char *fmt = (void *)(unsigned long)env->gpr[4][env->current_tc];
  644 + unsigned char *fmt = (void *)(unsigned long)env->gpr[env->current_tc][4];
645 645 printf("%s", fmt);
646 646 }
647 647 break;
... ...
target-mips/op_template.c
... ... @@ -21,31 +21,31 @@
21 21 #if defined(REG)
22 22 void glue(op_load_gpr_T0_gpr, REG) (void)
23 23 {
24   - T0 = env->gpr[REG][env->current_tc];
  24 + T0 = env->gpr[env->current_tc][REG];
25 25 FORCE_RET();
26 26 }
27 27  
28 28 void glue(op_store_T0_gpr_gpr, REG) (void)
29 29 {
30   - env->gpr[REG][env->current_tc] = T0;
  30 + env->gpr[env->current_tc][REG] = T0;
31 31 FORCE_RET();
32 32 }
33 33  
34 34 void glue(op_load_gpr_T1_gpr, REG) (void)
35 35 {
36   - T1 = env->gpr[REG][env->current_tc];
  36 + T1 = env->gpr[env->current_tc][REG];
37 37 FORCE_RET();
38 38 }
39 39  
40 40 void glue(op_store_T1_gpr_gpr, REG) (void)
41 41 {
42   - env->gpr[REG][env->current_tc] = T1;
  42 + env->gpr[env->current_tc][REG] = T1;
43 43 FORCE_RET();
44 44 }
45 45  
46 46 void glue(op_load_gpr_T2_gpr, REG) (void)
47 47 {
48   - T2 = env->gpr[REG][env->current_tc];
  48 + T2 = env->gpr[env->current_tc][REG];
49 49 FORCE_RET();
50 50 }
51 51  
... ...
target-mips/translate.c
... ... @@ -6811,7 +6811,7 @@ void dump_fpu (CPUState *env)
6811 6811 {
6812 6812 if (loglevel) {
6813 6813 fprintf(logfile, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
6814   - env->PC[env->current_tc], env->HI[0][env->current_tc], env->LO[0][env->current_tc], env->hflags, env->btarget, env->bcond);
  6814 + env->PC[env->current_tc], env->HI[env->current_tc][0], env->LO[env->current_tc][0], env->hflags, env->btarget, env->bcond);
6815 6815 fpu_dump_state(env, logfile, fprintf, 0);
6816 6816 }
6817 6817 }
... ... @@ -6830,16 +6830,16 @@ void cpu_mips_check_sign_extensions (CPUState *env, FILE *f,
6830 6830  
6831 6831 if (!SIGN_EXT_P(env->PC[env->current_tc]))
6832 6832 cpu_fprintf(f, "BROKEN: pc=0x" TARGET_FMT_lx "\n", env->PC[env->current_tc]);
6833   - if (!SIGN_EXT_P(env->HI[0][env->current_tc]))
6834   - cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI[0][env->current_tc]);
6835   - if (!SIGN_EXT_P(env->LO[0][env->current_tc]))
6836   - cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO[0][env->current_tc]);
  6833 + if (!SIGN_EXT_P(env->HI[env->current_tc][0]))
  6834 + cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI[env->current_tc][0]);
  6835 + if (!SIGN_EXT_P(env->LO[env->current_tc][0]))
  6836 + cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO[env->current_tc][0]);
6837 6837 if (!SIGN_EXT_P(env->btarget))
6838 6838 cpu_fprintf(f, "BROKEN: btarget=0x" TARGET_FMT_lx "\n", env->btarget);
6839 6839  
6840 6840 for (i = 0; i < 32; i++) {
6841   - if (!SIGN_EXT_P(env->gpr[i][env->current_tc]))
6842   - cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[i][env->current_tc]);
  6841 + if (!SIGN_EXT_P(env->gpr[env->current_tc][i]))
  6842 + cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[env->current_tc][i]);
6843 6843 }
6844 6844  
6845 6845 if (!SIGN_EXT_P(env->CP0_EPC))
... ... @@ -6860,7 +6860,7 @@ void cpu_dump_state (CPUState *env, FILE *f,
6860 6860 for (i = 0; i < 32; i++) {
6861 6861 if ((i & 3) == 0)
6862 6862 cpu_fprintf(f, "GPR%02d:", i);
6863   - cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[i][env->current_tc]);
  6863 + cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[env->current_tc][i]);
6864 6864 if ((i & 3) == 3)
6865 6865 cpu_fprintf(f, "\n");
6866 6866 }
... ...