gwj / at91sam9263 · Commits

Commit d0660ed4828f5292bb8605764c2e87b1c6c6f816

Authored by balrog
1 parent eae6ce52

Relax a constraint for qemu_ld64 on ARM host. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4567 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 13 additions and 4 deletions
tcg/arm/tcg-target.c
  View file @d0660ed
... ... @@ -109,7 +109,7 @@ int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
109 109 break;
110 110  
111 111 #ifdef CONFIG_SOFTMMU
112   - /* qemu_ld/st inputs (unless 'X' or 'D') */
  112 + /* qemu_ld/st inputs (unless 'X', 'd' or 'D') */
113 113 case 'x':
114 114 ct->ct |= TCG_CT_REG;
115 115 tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);
... ... @@ -117,6 +117,14 @@ int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
117 117 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R1);
118 118 break;
119 119  
  120 + /* qemu_ld64 data_reg */
  121 + case 'd':
  122 + ct->ct |= TCG_CT_REG;
  123 + tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);
  124 + /* r1 is still needed to load data_reg2, so don't use it. */
  125 + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R1);
  126 + break;
  127 +
120 128 /* qemu_ld/st64 data_reg2 */
121 129 case 'D':
122 130 ct->ct |= TCG_CT_REG;
... ... @@ -963,8 +971,9 @@ static inline void tcg_out_qemu_ld(TCGContext *s, int cond,
963 971 data_reg, 0, 0, SHIFT_IMM_LSL(0));
964 972 break;
965 973 case 3:
966   - tcg_out_dat_reg(s, cond, ARITH_MOV,
967   - data_reg, 0, 0, SHIFT_IMM_LSL(0));
  974 + if (data_reg != 0)
  975 + tcg_out_dat_reg(s, cond, ARITH_MOV,
  976 + data_reg, 0, 0, SHIFT_IMM_LSL(0));
968 977 if (data_reg2 != 1)
969 978 tcg_out_dat_reg(s, cond, ARITH_MOV,
970 979 data_reg2, 0, 1, SHIFT_IMM_LSL(0));
... ... @@ -1497,7 +1506,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
1497 1506 { INDEX_op_qemu_ld16u, { "r", "x", "X" } },
1498 1507 { INDEX_op_qemu_ld16s, { "r", "x", "X" } },
1499 1508 { INDEX_op_qemu_ld32u, { "r", "x", "X" } },
1500   - { INDEX_op_qemu_ld64, { "x", "r", "x", "X" } },
  1509 + { INDEX_op_qemu_ld64, { "d", "r", "x", "X" } },
1501 1510  
1502 1511 { INDEX_op_qemu_st8, { "x", "x", "X" } },
1503 1512 { INDEX_op_qemu_st16, { "x", "x", "X" } },
... ...