gwj / at91sam9263 · Commits

Commit cfdcd37aa5d98d42fbe50e9e5c694b2498ec57a0

Authored by aurel32
1 parent df0fc998

ppc: Convert ctr, lr moves to TCG 

Introduce TCG variables cpu_{ctr,lr} and replace op_{load,store}_{lr,ctr}
with tcg_gen_mov_tl.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5217 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 12 additions and 28 deletions
target-ppc/op.c
  View file @cfdcd37
@@ -233,30 +233,6 @@ void OPPROTO op_mask_spr (void) @@ -233,30 +233,6 @@ void OPPROTO op_mask_spr (void)
233 RETURN(); 233 RETURN();
234 } 234 }
235 235
236 -void OPPROTO op_load_lr (void)  
237 -{  
238 - T0 = env->lr;  
239 - RETURN();  
240 -}  
241 -  
242 -void OPPROTO op_store_lr (void)  
243 -{  
244 - env->lr = T0;  
245 - RETURN();  
246 -}  
247 -  
248 -void OPPROTO op_load_ctr (void)  
249 -{  
250 - T0 = env->ctr;  
251 - RETURN();  
252 -}  
253 -  
254 -void OPPROTO op_store_ctr (void)  
255 -{  
256 - env->ctr = T0;  
257 - RETURN();  
258 -}  
259 -  
260 void OPPROTO op_load_tbl (void) 236 void OPPROTO op_load_tbl (void)
261 { 237 {
262 T0 = cpu_ppc_load_tbl(env); 238 T0 = cpu_ppc_load_tbl(env);
target-ppc/translate.c
  View file @cfdcd37
@@ -61,6 +61,8 @@ static TCGv cpu_fpr[32]; @@ -61,6 +61,8 @@ static TCGv cpu_fpr[32];
61 static TCGv cpu_avrh[32], cpu_avrl[32]; 61 static TCGv cpu_avrh[32], cpu_avrl[32];
62 static TCGv cpu_crf[8]; 62 static TCGv cpu_crf[8];
63 static TCGv cpu_nip; 63 static TCGv cpu_nip;
  64 +static TCGv cpu_ctr;
  65 +static TCGv cpu_lr;
64 66
65 /* dyngen register indexes */ 67 /* dyngen register indexes */
66 static TCGv cpu_T[3]; 68 static TCGv cpu_T[3];
@@ -168,6 +170,12 @@ void ppc_translate_init(void) @@ -168,6 +170,12 @@ void ppc_translate_init(void)
168 cpu_nip = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, 170 cpu_nip = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
169 offsetof(CPUState, nip), "nip"); 171 offsetof(CPUState, nip), "nip");
170 172
  173 + cpu_ctr = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
  174 + offsetof(CPUState, ctr), "ctr");
  175 +
  176 + cpu_lr = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
  177 + offsetof(CPUState, lr), "lr");
  178 +
171 /* register helpers */ 179 /* register helpers */
172 #undef DEF_HELPER 180 #undef DEF_HELPER
173 #define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name); 181 #define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name);
target-ppc/translate_init.c
  View file @cfdcd37
@@ -110,23 +110,23 @@ static void spr_write_xer (void *opaque, int sprn) @@ -110,23 +110,23 @@ static void spr_write_xer (void *opaque, int sprn)
110 /* LR */ 110 /* LR */
111 static void spr_read_lr (void *opaque, int sprn) 111 static void spr_read_lr (void *opaque, int sprn)
112 { 112 {
113 - gen_op_load_lr(); 113 + tcg_gen_mov_tl(cpu_T[0], cpu_lr);
114 } 114 }
115 115
116 static void spr_write_lr (void *opaque, int sprn) 116 static void spr_write_lr (void *opaque, int sprn)
117 { 117 {
118 - gen_op_store_lr(); 118 + tcg_gen_mov_tl(cpu_lr, cpu_T[0]);
119 } 119 }
120 120
121 /* CTR */ 121 /* CTR */
122 static void spr_read_ctr (void *opaque, int sprn) 122 static void spr_read_ctr (void *opaque, int sprn)
123 { 123 {
124 - gen_op_load_ctr(); 124 + tcg_gen_mov_tl(cpu_T[0], cpu_ctr);
125 } 125 }
126 126
127 static void spr_write_ctr (void *opaque, int sprn) 127 static void spr_write_ctr (void *opaque, int sprn)
128 { 128 {
129 - gen_op_store_ctr(); 129 + tcg_gen_mov_tl(cpu_ctr, cpu_T[0]);
130 } 130 }
131 131
132 /* User read access to SPR */ 132 /* User read access to SPR */