gwj / at91sam9263 · Commits

Commit cdc0faa66ac5c5452e215eb9e07d3909ff796ba1

Authored by aurel32
1 parent 1ba74fb8

target-mips: optimize gen_trap() 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6937 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 12 additions and 26 deletions
target-mips/translate.c
  View file @cdc0faa
@@ -2166,7 +2166,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, @@ -2166,7 +2166,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
2166 int rs, int rt, int16_t imm) 2166 int rs, int rt, int16_t imm)
2167 { 2167 {
2168 int cond; 2168 int cond;
2169 - TCGv t0 = tcg_temp_local_new(); 2169 + TCGv t0 = tcg_temp_new();
2170 TCGv t1 = tcg_temp_new(); 2170 TCGv t1 = tcg_temp_new();
2171 2171
2172 cond = 0; 2172 cond = 0;
@@ -2208,7 +2208,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, @@ -2208,7 +2208,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
2208 case OPC_TGEU: /* rs >= rs unsigned */ 2208 case OPC_TGEU: /* rs >= rs unsigned */
2209 case OPC_TGEIU: /* r0 >= 0 unsigned */ 2209 case OPC_TGEIU: /* r0 >= 0 unsigned */
2210 /* Always trap */ 2210 /* Always trap */
2211 - tcg_gen_movi_tl(t0, 1); 2211 + generate_exception(ctx, EXCP_TRAP);
2212 break; 2212 break;
2213 case OPC_TLT: /* rs < rs */ 2213 case OPC_TLT: /* rs < rs */
2214 case OPC_TLTI: /* r0 < 0 */ 2214 case OPC_TLTI: /* r0 < 0 */
@@ -2217,54 +2217,40 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, @@ -2217,54 +2217,40 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
2217 case OPC_TNE: /* rs != rs */ 2217 case OPC_TNE: /* rs != rs */
2218 case OPC_TNEI: /* r0 != 0 */ 2218 case OPC_TNEI: /* r0 != 0 */
2219 /* Never trap: treat as NOP. */ 2219 /* Never trap: treat as NOP. */
2220 - goto out;  
2221 - default:  
2222 - MIPS_INVAL("trap");  
2223 - generate_exception(ctx, EXCP_RI);  
2224 - goto out; 2220 + break;
2225 } 2221 }
2226 } else { 2222 } else {
  2223 + int l1 = gen_new_label();
  2224 +
2227 switch (opc) { 2225 switch (opc) {
2228 case OPC_TEQ: 2226 case OPC_TEQ:
2229 case OPC_TEQI: 2227 case OPC_TEQI:
2230 - gen_op_eq(t0, t0, t1); 2228 + tcg_gen_brcond_tl(TCG_COND_NE, t0, t1, l1);
2231 break; 2229 break;
2232 case OPC_TGE: 2230 case OPC_TGE:
2233 case OPC_TGEI: 2231 case OPC_TGEI:
2234 - gen_op_ge(t0, t0, t1); 2232 + tcg_gen_brcond_tl(TCG_COND_LT, t0, t1, l1);
2235 break; 2233 break;
2236 case OPC_TGEU: 2234 case OPC_TGEU:
2237 case OPC_TGEIU: 2235 case OPC_TGEIU:
2238 - gen_op_geu(t0, t0, t1); 2236 + tcg_gen_brcond_tl(TCG_COND_LTU, t0, t1, l1);
2239 break; 2237 break;
2240 case OPC_TLT: 2238 case OPC_TLT:
2241 case OPC_TLTI: 2239 case OPC_TLTI:
2242 - gen_op_lt(t0, t0, t1); 2240 + tcg_gen_brcond_tl(TCG_COND_GE, t0, t1, l1);
2243 break; 2241 break;
2244 case OPC_TLTU: 2242 case OPC_TLTU:
2245 case OPC_TLTIU: 2243 case OPC_TLTIU:
2246 - gen_op_ltu(t0, t0, t1); 2244 + tcg_gen_brcond_tl(TCG_COND_GEU, t0, t1, l1);
2247 break; 2245 break;
2248 case OPC_TNE: 2246 case OPC_TNE:
2249 case OPC_TNEI: 2247 case OPC_TNEI:
2250 - gen_op_ne(t0, t0, t1); 2248 + tcg_gen_brcond_tl(TCG_COND_EQ, t0, t1, l1);
2251 break; 2249 break;
2252 - default:  
2253 - MIPS_INVAL("trap");  
2254 - generate_exception(ctx, EXCP_RI);  
2255 - goto out;  
2256 } 2250 }
2257 - }  
2258 - save_cpu_state(ctx, 1);  
2259 - {  
2260 - int l1 = gen_new_label();  
2261 -  
2262 - tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);  
2263 - gen_helper_0i(raise_exception, EXCP_TRAP); 2251 + generate_exception(ctx, EXCP_TRAP);
2264 gen_set_label(l1); 2252 gen_set_label(l1);
2265 } 2253 }
2266 - ctx->bstate = BS_STOP;  
2267 - out:  
2268 tcg_temp_free(t0); 2254 tcg_temp_free(t0);
2269 tcg_temp_free(t1); 2255 tcg_temp_free(t1);
2270 } 2256 }