gwj / at91sam9263 · Commits

Commit cd633b10fd99faeb01c94ba35ec35f48f4e86a68

Authored by aurel32
1 parent 5e1d0985

Add vsldoi instruction. 

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6171 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 3 changed files with 50 additions and 0 deletions
target-ppc/helper.h
  View file @cd633b1
@@ -155,6 +155,7 @@ DEF_HELPER_2(lvsr, void, avr, tl); @@ -155,6 +155,7 @@ DEF_HELPER_2(lvsr, void, avr, tl);
155 DEF_HELPER_3(vrlb, void, avr, avr, avr) 155 DEF_HELPER_3(vrlb, void, avr, avr, avr)
156 DEF_HELPER_3(vrlh, void, avr, avr, avr) 156 DEF_HELPER_3(vrlh, void, avr, avr, avr)
157 DEF_HELPER_3(vrlw, void, avr, avr, avr) 157 DEF_HELPER_3(vrlw, void, avr, avr, avr)
  158 +DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)
158 159
159 DEF_HELPER_1(efscfsi, i32, i32) 160 DEF_HELPER_1(efscfsi, i32, i32)
160 DEF_HELPER_1(efscfui, i32, i32) 161 DEF_HELPER_1(efscfui, i32, i32)
target-ppc/op_helper.c
  View file @cd633b1
@@ -2145,6 +2145,34 @@ VSL(h, u16) @@ -2145,6 +2145,34 @@ VSL(h, u16)
2145 VSL(w, u32) 2145 VSL(w, u32)
2146 #undef VSL 2146 #undef VSL
2147 2147
  2148 +void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift)
  2149 +{
  2150 + int sh = shift & 0xf;
  2151 + int i;
  2152 + ppc_avr_t result;
  2153 +
  2154 +#if defined(WORDS_BIGENDIAN)
  2155 + for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
  2156 + int index = sh + i;
  2157 + if (index > 0xf) {
  2158 + result.u8[i] = b->u8[index-0x10];
  2159 + } else {
  2160 + result.u8[i] = a->u8[index];
  2161 + }
  2162 + }
  2163 +#else
  2164 + for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
  2165 + int index = (16 - sh) + i;
  2166 + if (index > 0xf) {
  2167 + result.u8[i] = a->u8[index-0x10];
  2168 + } else {
  2169 + result.u8[i] = b->u8[index];
  2170 + }
  2171 + }
  2172 +#endif
  2173 + *r = result;
  2174 +}
  2175 +
2148 void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) 2176 void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2149 { 2177 {
2150 int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; 2178 int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf;
target-ppc/translate.c
  View file @cd633b1
@@ -374,6 +374,8 @@ EXTRACT_HELPER(UIMM, 0, 16); @@ -374,6 +374,8 @@ EXTRACT_HELPER(UIMM, 0, 16);
374 EXTRACT_HELPER(NB, 11, 5); 374 EXTRACT_HELPER(NB, 11, 5);
375 /* Shift count */ 375 /* Shift count */
376 EXTRACT_HELPER(SH, 11, 5); 376 EXTRACT_HELPER(SH, 11, 5);
  377 +/* Vector shift count */
  378 +EXTRACT_HELPER(VSH, 6, 4);
377 /* Mask start */ 379 /* Mask start */
378 EXTRACT_HELPER(MB, 6, 5); 380 EXTRACT_HELPER(MB, 6, 5);
379 /* Mask end */ 381 /* Mask end */
@@ -6268,6 +6270,25 @@ GEN_VXFORM(vrlb, 2, 0); @@ -6268,6 +6270,25 @@ GEN_VXFORM(vrlb, 2, 0);
6268 GEN_VXFORM(vrlh, 2, 1); 6270 GEN_VXFORM(vrlh, 2, 1);
6269 GEN_VXFORM(vrlw, 2, 2); 6271 GEN_VXFORM(vrlw, 2, 2);
6270 6272
  6273 +GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC)
  6274 +{
  6275 + TCGv_ptr ra, rb, rd;
  6276 + TCGv sh;
  6277 + if (unlikely(!ctx->altivec_enabled)) {
  6278 + gen_exception(ctx, POWERPC_EXCP_VPU);
  6279 + return;
  6280 + }
  6281 + ra = gen_avr_ptr(rA(ctx->opcode));
  6282 + rb = gen_avr_ptr(rB(ctx->opcode));
  6283 + rd = gen_avr_ptr(rD(ctx->opcode));
  6284 + sh = tcg_const_i32(VSH(ctx->opcode));
  6285 + gen_helper_vsldoi (rd, ra, rb, sh);
  6286 + tcg_temp_free_ptr(ra);
  6287 + tcg_temp_free_ptr(rb);
  6288 + tcg_temp_free_ptr(rd);
  6289 + tcg_temp_free(sh);
  6290 +}
  6291 +
6271 /*** SPE extension ***/ 6292 /*** SPE extension ***/
6272 /* Register moves */ 6293 /* Register moves */
6273 6294