Commit cd072e01d86b3d7adab35de03d242e3938e798df
1 parent
d3e9db93
fixed null segment validation (aka x86_64 regression bug)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1708 c046a42c-6fe2-441c-8c8c-71466251a162
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target-i386/helper.c
| @@ -1986,7 +1986,14 @@ static inline void validate_seg(int seg_reg, int cpl) | @@ -1986,7 +1986,14 @@ static inline void validate_seg(int seg_reg, int cpl) | ||
| 1986 | { | 1986 | { |
| 1987 | int dpl; | 1987 | int dpl; |
| 1988 | uint32_t e2; | 1988 | uint32_t e2; |
| 1989 | - | 1989 | + |
| 1990 | + /* XXX: on x86_64, we do not want to nullify FS and GS because | ||
| 1991 | + they may still contain a valid base. I would be interested to | ||
| 1992 | + know how a real x86_64 CPU behaves */ | ||
| 1993 | + if ((seg_reg == R_FS || seg_reg == R_GS) && | ||
| 1994 | + (env->segs[seg_reg].selector & 0xfffc) == 0) | ||
| 1995 | + return; | ||
| 1996 | + | ||
| 1990 | e2 = env->segs[seg_reg].flags; | 1997 | e2 = env->segs[seg_reg].flags; |
| 1991 | dpl = (e2 >> DESC_DPL_SHIFT) & 3; | 1998 | dpl = (e2 >> DESC_DPL_SHIFT) & 3; |
| 1992 | if (!(e2 & DESC_CS_MASK) || !(e2 & DESC_C_MASK)) { | 1999 | if (!(e2 & DESC_CS_MASK) || !(e2 & DESC_C_MASK)) { |