Commit cbeb0857da13d8a06453dd1527a2bcca61556497
1 parent
e04bcc69
Set proper BadVAddress value for unaligned instruction fetch.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
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1 deletions
target-mips/translate.c
... | ... | @@ -1486,7 +1486,7 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc, |
1486 | 1486 | /* Jump to register */ |
1487 | 1487 | if (offset != 0 && offset != 16) { |
1488 | 1488 | /* Hint = 0 is JR/JALR, hint 16 is JR.HB/JALR.HB, the |
1489 | - others are reserved. */ | |
1489 | + others are reserved. */ | |
1490 | 1490 | generate_exception(ctx, EXCP_RI); |
1491 | 1491 | return; |
1492 | 1492 | } |
... | ... | @@ -4629,6 +4629,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) |
4629 | 4629 | |
4630 | 4630 | /* make sure instructions are on a word boundary */ |
4631 | 4631 | if (ctx->pc & 0x3) { |
4632 | + env->CP0_BadVAddr = ctx->pc; | |
4632 | 4633 | generate_exception(ctx, EXCP_AdEL); |
4633 | 4634 | return; |
4634 | 4635 | } | ... | ... |