Commit cbbccffc7acebb3256f58b232b4f9d819f9596ec
1 parent
d78f3995
Fix ARM quadword VDUP (core register).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6857 c046a42c-6fe2-441c-8c8c-71466251a162
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6 additions
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4 deletions
target-arm/translate.c
... | ... | @@ -2783,10 +2783,12 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) |
2783 | 2783 | } else if (size == 1) { |
2784 | 2784 | gen_neon_dup_low16(tmp); |
2785 | 2785 | } |
2786 | - tmp2 = new_tmp(); | |
2787 | - tcg_gen_mov_i32(tmp2, tmp); | |
2788 | - neon_store_reg(rn, 0, tmp2); | |
2789 | - neon_store_reg(rn, 1, tmp); | |
2786 | + for (n = 0; n <= pass * 2; n++) { | |
2787 | + tmp2 = new_tmp(); | |
2788 | + tcg_gen_mov_i32(tmp2, tmp); | |
2789 | + neon_store_reg(rn, n, tmp2); | |
2790 | + } | |
2791 | + neon_store_reg(rn, n, tmp); | |
2790 | 2792 | } else { |
2791 | 2793 | /* VMOV */ |
2792 | 2794 | switch (size) { | ... | ... |