gwj / at91sam9263 · Commits

Commit cb63669a54fdd926da7d07768f21f515acd4ad2a

Authored by pbrook
1 parent 455f9004

Fix ARM conditional branch bug. 

Add tcg_gen_brcondi.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 6 changed files with 131 additions and 121 deletions
target-arm/translate.c
  View file @cb63669
... ... @@ -662,94 +662,92 @@ static void gen_test_cc(int cc, int label)
662 662 {
663 663 TCGv tmp;
664 664 TCGv tmp2;
665   - TCGv zero;
666 665 int inv;
667 666  
668   - zero = tcg_const_i32(0);
669 667 switch (cc) {
670 668 case 0: /* eq: Z */
671 669 tmp = load_cpu_field(ZF);
672   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
  670 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
673 671 break;
674 672 case 1: /* ne: !Z */
675 673 tmp = load_cpu_field(ZF);
676   - tcg_gen_brcond_i32(TCG_COND_NE, tmp, zero, label);
  674 + tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label);
677 675 break;
678 676 case 2: /* cs: C */
679 677 tmp = load_cpu_field(CF);
680   - tcg_gen_brcond_i32(TCG_COND_NE, tmp, zero, label);
  678 + tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label);
681 679 break;
682 680 case 3: /* cc: !C */
683 681 tmp = load_cpu_field(CF);
684   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
  682 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
685 683 break;
686 684 case 4: /* mi: N */
687 685 tmp = load_cpu_field(NF);
688   - tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
  686 + tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
689 687 break;
690 688 case 5: /* pl: !N */
691 689 tmp = load_cpu_field(NF);
692   - tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
  690 + tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
693 691 break;
694 692 case 6: /* vs: V */
695 693 tmp = load_cpu_field(VF);
696   - tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
  694 + tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
697 695 break;
698 696 case 7: /* vc: !V */
699 697 tmp = load_cpu_field(VF);
700   - tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
  698 + tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
701 699 break;
702 700 case 8: /* hi: C && !Z */
703 701 inv = gen_new_label();
704 702 tmp = load_cpu_field(CF);
705   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, inv);
  703 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, inv);
706 704 dead_tmp(tmp);
707 705 tmp = load_cpu_field(ZF);
708   - tcg_gen_brcond_i32(TCG_COND_NE, tmp, zero, label);
  706 + tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label);
709 707 gen_set_label(inv);
710 708 break;
711 709 case 9: /* ls: !C || Z */
712 710 tmp = load_cpu_field(CF);
713   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
  711 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
714 712 dead_tmp(tmp);
715 713 tmp = load_cpu_field(ZF);
716   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
  714 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
717 715 break;
718 716 case 10: /* ge: N == V -> N ^ V == 0 */
719 717 tmp = load_cpu_field(VF);
720 718 tmp2 = load_cpu_field(NF);
721 719 tcg_gen_xor_i32(tmp, tmp, tmp2);
722 720 dead_tmp(tmp2);
723   - tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
  721 + tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
724 722 break;
725 723 case 11: /* lt: N != V -> N ^ V != 0 */
726 724 tmp = load_cpu_field(VF);
727 725 tmp2 = load_cpu_field(NF);
728 726 tcg_gen_xor_i32(tmp, tmp, tmp2);
729 727 dead_tmp(tmp2);
730   - tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
  728 + tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
731 729 break;
732 730 case 12: /* gt: !Z && N == V */
733 731 inv = gen_new_label();
734 732 tmp = load_cpu_field(ZF);
735   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, inv);
  733 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, inv);
736 734 dead_tmp(tmp);
737 735 tmp = load_cpu_field(VF);
738 736 tmp2 = load_cpu_field(NF);
739 737 tcg_gen_xor_i32(tmp, tmp, tmp2);
740 738 dead_tmp(tmp2);
741   - tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
  739 + tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
742 740 gen_set_label(inv);
743 741 break;
744 742 case 13: /* le: Z || N != V */
745 743 tmp = load_cpu_field(ZF);
746   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
  744 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
747 745 dead_tmp(tmp);
748 746 tmp = load_cpu_field(VF);
749 747 tmp2 = load_cpu_field(NF);
750 748 tcg_gen_xor_i32(tmp, tmp, tmp2);
751 749 dead_tmp(tmp2);
752   - tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
  750 + tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
753 751 break;
754 752 default:
755 753 fprintf(stderr, "Bad condition code 0x%x\n", cc);
... ... @@ -6233,8 +6231,8 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
6233 6231 int label = gen_new_label();
6234 6232 rm = insn & 0xf;
6235 6233 gen_helper_test_exclusive(cpu_T[0], cpu_env, addr);
6236   - tcg_gen_brcond_i32(TCG_COND_NE, cpu_T[0],
6237   - tcg_const_i32(0), label);
  6234 + tcg_gen_brcondi_i32(TCG_COND_NE, cpu_T[0],
  6235 + 0, label);
6238 6236 tmp = load_reg(s,rm);
6239 6237 gen_st32(tmp, cpu_T[1], IS_USER(s));
6240 6238 gen_set_label(label);
... ... @@ -6984,8 +6982,8 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
6984 6982 } else {
6985 6983 int label = gen_new_label();
6986 6984 gen_helper_test_exclusive(cpu_T[0], cpu_env, addr);
6987   - tcg_gen_brcond_i32(TCG_COND_NE, cpu_T[0],
6988   - tcg_const_i32(0), label);
  6985 + tcg_gen_brcondi_i32(TCG_COND_NE, cpu_T[0],
  6986 + 0, label);
6989 6987 tmp = load_reg(s, rs);
6990 6988 gen_st32(tmp, cpu_T[1], IS_USER(s));
6991 6989 gen_set_label(label);
... ... @@ -7047,8 +7045,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
7047 7045 int label = gen_new_label();
7048 7046 /* Must use a global that is not killed by the branch. */
7049 7047 gen_helper_test_exclusive(cpu_T[0], cpu_env, addr);
7050   - tcg_gen_brcond_i32(TCG_COND_NE, cpu_T[0], tcg_const_i32(0),
7051   - label);
  7048 + tcg_gen_brcondi_i32(TCG_COND_NE, cpu_T[0], 0, label);
7052 7049 tmp = load_reg(s, rs);
7053 7050 switch (op) {
7054 7051 case 0:
... ... @@ -8364,13 +8361,12 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s)
8364 8361 case 1: case 3: case 9: case 11: /* czb */
8365 8362 rm = insn & 7;
8366 8363 tmp = load_reg(s, rm);
8367   - tmp2 = tcg_const_i32(0);
8368 8364 s->condlabel = gen_new_label();
8369 8365 s->condjmp = 1;
8370 8366 if (insn & (1 << 11))
8371   - tcg_gen_brcond_i32(TCG_COND_EQ, tmp, tmp2, s->condlabel);
  8367 + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, s->condlabel);
8372 8368 else
8373   - tcg_gen_brcond_i32(TCG_COND_NE, tmp, tmp2, s->condlabel);
  8369 + tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, s->condlabel);
8374 8370 dead_tmp(tmp);
8375 8371 offset = ((insn & 0xf8) >> 2) | (insn & 0x200) >> 3;
8376 8372 val = (uint32_t)s->pc + 2;
... ...
target-cris/translate.c
  View file @cb63669
... ... @@ -219,7 +219,7 @@ static void t_gen_lsl(TCGv d, TCGv a, TCGv b)
219 219 l1 = gen_new_label();
220 220 /* Speculative shift. */
221 221 tcg_gen_shl_tl(d, a, b);
222   - tcg_gen_brcond_tl(TCG_COND_LEU, b, tcg_const_tl(31), l1);
  222 + tcg_gen_brcondi_tl(TCG_COND_LEU, b, 31, l1);
223 223 /* Clear dst if shift operands were to large. */
224 224 tcg_gen_movi_tl(d, 0);
225 225 gen_set_label(l1);
... ... @@ -232,7 +232,7 @@ static void t_gen_lsr(TCGv d, TCGv a, TCGv b)
232 232 l1 = gen_new_label();
233 233 /* Speculative shift. */
234 234 tcg_gen_shr_tl(d, a, b);
235   - tcg_gen_brcond_tl(TCG_COND_LEU, b, tcg_const_tl(31), l1);
  235 + tcg_gen_brcondi_tl(TCG_COND_LEU, b, 31, l1);
236 236 /* Clear dst if shift operands were to large. */
237 237 tcg_gen_movi_tl(d, 0);
238 238 gen_set_label(l1);
... ... @@ -245,7 +245,7 @@ static void t_gen_asr(TCGv d, TCGv a, TCGv b)
245 245 l1 = gen_new_label();
246 246 /* Speculative shift. */
247 247 tcg_gen_sar_tl(d, a, b);
248   - tcg_gen_brcond_tl(TCG_COND_LEU, b, tcg_const_tl(31), l1);
  248 + tcg_gen_brcondi_tl(TCG_COND_LEU, b, 31, l1);
249 249 /* Clear dst if shift operands were to large. */
250 250 tcg_gen_sar_tl(d, a, tcg_const_tl(30));
251 251 gen_set_label(l1);
... ... @@ -406,7 +406,7 @@ static void t_gen_btst(TCGv d, TCGv s)
406 406 tcg_gen_andi_tl(d, cpu_PR[PR_CCS], ~(X_FLAG | N_FLAG | Z_FLAG));
407 407 /* or in the N_FLAG. */
408 408 tcg_gen_or_tl(d, d, bset);
409   - tcg_gen_brcond_tl(TCG_COND_NE, sbit, tcg_const_tl(0), l1);
  409 + tcg_gen_brcondi_tl(TCG_COND_NE, sbit, 0, l1);
410 410 /* or in the Z_FLAG. */
411 411 tcg_gen_ori_tl(d, d, Z_FLAG);
412 412 gen_set_label(l1);
... ... @@ -591,7 +591,7 @@ static void t_gen_cc_jmp(TCGv pc_true, TCGv pc_false)
591 591 /* Conditional jmp. */
592 592 t_gen_mov_TN_env(btaken, btaken);
593 593 tcg_gen_mov_tl(env_pc, pc_false);
594   - tcg_gen_brcond_tl(TCG_COND_EQ, btaken, tcg_const_tl(0), l1);
  594 + tcg_gen_brcondi_tl(TCG_COND_EQ, btaken, 0, l1);
595 595 tcg_gen_mov_tl(env_pc, pc_true);
596 596 gen_set_label(l1);
597 597  
... ... @@ -902,8 +902,8 @@ static void gen_tst_cc (DisasContext *dc, int cond)
902 902 int l1;
903 903 l1 = gen_new_label();
904 904 tcg_gen_movi_tl(cpu_T[0], 0);
905   - tcg_gen_brcond_tl(TCG_COND_NE, cc_result,
906   - tcg_const_tl(0), l1);
  905 + tcg_gen_brcondi_tl(TCG_COND_NE, cc_result,
  906 + 0, l1);
907 907 tcg_gen_movi_tl(cpu_T[0], 1);
908 908 gen_set_label(l1);
909 909 }
... ... @@ -1461,7 +1461,7 @@ static unsigned int dec_scc_r(DisasContext *dc)
1461 1461  
1462 1462 l1 = gen_new_label();
1463 1463 tcg_gen_movi_tl(cpu_R[dc->op1], 0);
1464   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
  1464 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
1465 1465 tcg_gen_movi_tl(cpu_R[dc->op1], 1);
1466 1466 gen_set_label(l1);
1467 1467 }
... ... @@ -1618,7 +1618,7 @@ static unsigned int dec_abs_r(DisasContext *dc)
1618 1618  
1619 1619 /* TODO: consider a branch free approach. */
1620 1620 l1 = gen_new_label();
1621   - tcg_gen_brcond_tl(TCG_COND_GE, cpu_T[1], tcg_const_tl(0), l1);
  1621 + tcg_gen_brcondi_tl(TCG_COND_GE, cpu_T[1], 0, l1);
1622 1622 tcg_gen_neg_tl(cpu_T[1], cpu_T[1]);
1623 1623 gen_set_label(l1);
1624 1624 crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4);
... ...
target-i386/translate.c
  View file @cb63669
... ... @@ -703,14 +703,14 @@ static inline void gen_op_jnz_ecx(int size, int label1)
703 703 {
704 704 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
705 705 gen_extu(size + 1, cpu_tmp0);
706   - tcg_gen_brcond_tl(TCG_COND_NE, cpu_tmp0, tcg_const_tl(0), label1);
  706 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1);
707 707 }
708 708  
709 709 static inline void gen_op_jz_ecx(int size, int label1)
710 710 {
711 711 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
712 712 gen_extu(size + 1, cpu_tmp0);
713   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), label1);
  713 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
714 714 }
715 715  
716 716 static void *helper_in_func[3] = {
... ... @@ -1000,32 +1000,31 @@ static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1)
1000 1000 t0 = cpu_cc_dst;
1001 1001 break;
1002 1002 }
1003   - tcg_gen_brcond_tl(inv ? TCG_COND_NE : TCG_COND_EQ, t0,
1004   - tcg_const_tl(0), l1);
  1003 + tcg_gen_brcondi_tl(inv ? TCG_COND_NE : TCG_COND_EQ, t0, 0, l1);
1005 1004 break;
1006 1005 case JCC_S:
1007 1006 fast_jcc_s:
1008 1007 switch(size) {
1009 1008 case 0:
1010 1009 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x80);
1011   - tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
1012   - tcg_const_tl(0), l1);
  1010 + tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
  1011 + 0, l1);
1013 1012 break;
1014 1013 case 1:
1015 1014 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x8000);
1016   - tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
1017   - tcg_const_tl(0), l1);
  1015 + tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
  1016 + 0, l1);
1018 1017 break;
1019 1018 #ifdef TARGET_X86_64
1020 1019 case 2:
1021 1020 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x80000000);
1022   - tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
1023   - tcg_const_tl(0), l1);
  1021 + tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
  1022 + 0, l1);
1024 1023 break;
1025 1024 #endif
1026 1025 default:
1027   - tcg_gen_brcond_tl(inv ? TCG_COND_GE : TCG_COND_LT, cpu_cc_dst,
1028   - tcg_const_tl(0), l1);
  1026 + tcg_gen_brcondi_tl(inv ? TCG_COND_GE : TCG_COND_LT, cpu_cc_dst,
  1027 + 0, l1);
1029 1028 break;
1030 1029 }
1031 1030 break;
... ... @@ -1153,8 +1152,8 @@ static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1)
1153 1152 default:
1154 1153 slow_jcc:
1155 1154 gen_setcc_slow_T0(jcc_op);
1156   - tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE,
1157   - cpu_T[0], tcg_const_tl(0), l1);
  1155 + tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE,
  1156 + cpu_T[0], 0, l1);
1158 1157 break;
1159 1158 }
1160 1159 }
... ... @@ -1479,7 +1478,7 @@ static void gen_shift_rm_T1(DisasContext *s, int ot, int op1,
1479 1478 gen_op_set_cc_op(s->cc_op);
1480 1479  
1481 1480 shift_label = gen_new_label();
1482   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), shift_label);
  1481 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, shift_label);
1483 1482  
1484 1483 tcg_gen_mov_tl(cpu_cc_src, cpu_T3);
1485 1484 tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]);
... ... @@ -1574,7 +1573,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1,
1574 1573 /* Must test zero case to avoid using undefined behaviour in TCG
1575 1574 shifts. */
1576 1575 label1 = gen_new_label();
1577   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), label1);
  1576 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, label1);
1578 1577  
1579 1578 if (ot <= OT_WORD)
1580 1579 tcg_gen_andi_tl(cpu_tmp0, cpu_T[1], (1 << (3 + ot)) - 1);
... ... @@ -1610,7 +1609,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1,
1610 1609 gen_op_set_cc_op(s->cc_op);
1611 1610  
1612 1611 label2 = gen_new_label();
1613   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), label2);
  1612 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, label2);
1614 1613  
1615 1614 gen_compute_eflags(cpu_cc_src);
1616 1615 tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~(CC_O | CC_C));
... ... @@ -1667,7 +1666,7 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
1667 1666  
1668 1667 /* update eflags */
1669 1668 label1 = gen_new_label();
1670   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(-1), label1);
  1669 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, -1, label1);
1671 1670  
1672 1671 tcg_gen_mov_tl(cpu_cc_src, cpu_T3);
1673 1672 tcg_gen_discard_tl(cpu_cc_dst);
... ... @@ -1699,7 +1698,7 @@ static void gen_shiftd_rm_T1_T3(DisasContext *s, int ot, int op1,
1699 1698 /* Must test zero case to avoid using undefined behaviour in TCG
1700 1699 shifts. */
1701 1700 label1 = gen_new_label();
1702   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label1);
  1701 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, 0, label1);
1703 1702  
1704 1703 tcg_gen_addi_tl(cpu_tmp5, cpu_T3, -1);
1705 1704 if (ot == OT_WORD) {
... ... @@ -1775,7 +1774,7 @@ static void gen_shiftd_rm_T1_T3(DisasContext *s, int ot, int op1,
1775 1774 gen_op_set_cc_op(s->cc_op);
1776 1775  
1777 1776 label2 = gen_new_label();
1778   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label2);
  1777 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, 0, label2);
1779 1778  
1780 1779 tcg_gen_mov_tl(cpu_cc_src, cpu_T[1]);
1781 1780 tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]);
... ... @@ -4375,7 +4374,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4375 4374 tcg_gen_ld_tl(cpu_T3, cpu_env, offsetof(CPUState, regs[R_EAX]));
4376 4375 tcg_gen_sub_tl(cpu_T3, cpu_T3, cpu_T[0]);
4377 4376 gen_extu(ot, cpu_T3);
4378   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label1);
  4377 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, 0, label1);
4379 4378 if (mod == 3) {
4380 4379 label2 = gen_new_label();
4381 4380 gen_op_mov_reg_T0(ot, R_EAX);
... ... @@ -5461,7 +5460,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
5461 5460 op1 = fcmov_cc[op & 3] | ((op >> 3) & 1);
5462 5461 gen_setcc(s, op1);
5463 5462 l1 = gen_new_label();
5464   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
  5463 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
5465 5464 tcg_gen_helper_0_1(helper_fmov_ST0_STN, tcg_const_i32(opreg));
5466 5465 gen_set_label(l1);
5467 5466 }
... ... @@ -6047,7 +6046,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6047 6046 gen_extu(ot, cpu_T[0]);
6048 6047 label1 = gen_new_label();
6049 6048 tcg_gen_movi_tl(cpu_cc_dst, 0);
6050   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), label1);
  6049 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, label1);
6051 6050 if (b & 1) {
6052 6051 tcg_gen_helper_1_1(helper_bsr, cpu_T[0], cpu_T[0]);
6053 6052 } else {
... ... @@ -6289,11 +6288,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6289 6288 gen_compute_eflags(cpu_tmp0);
6290 6289 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_Z);
6291 6290 if (b == 0) {
6292   - tcg_gen_brcond_tl(TCG_COND_EQ,
6293   - cpu_tmp0, tcg_const_tl(0), l1);
  6291 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
6294 6292 } else {
6295   - tcg_gen_brcond_tl(TCG_COND_NE,
6296   - cpu_tmp0, tcg_const_tl(0), l1);
  6293 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, l1);
6297 6294 }
6298 6295 break;
6299 6296 case 2: /* loop */
... ... @@ -6782,7 +6779,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6782 6779 tcg_gen_helper_1_1(helper_lsl, cpu_T[0], cpu_T[0]);
6783 6780 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z);
6784 6781 label1 = gen_new_label();
6785   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), label1);
  6782 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
6786 6783 gen_op_mov_reg_T0(ot, reg);
6787 6784 gen_set_label(label1);
6788 6785 s->cc_op = CC_OP_EFLAGS;
... ...
target-mips/translate.c
  View file @cb63669
... ... @@ -679,7 +679,7 @@ void glue(gen_op_, name) (target_ulong val) \
679 679 int l1 = gen_new_label(); \
680 680 int l2 = gen_new_label(); \
681 681 \
682   - tcg_gen_brcond_tl(cond, cpu_T[0], tcg_const_tl(val), l1); \
  682 + tcg_gen_brcondi_tl(cond, cpu_T[0], val, l1); \
683 683 tcg_gen_movi_tl(cpu_T[0], 0); \
684 684 tcg_gen_br(l2); \
685 685 gen_set_label(l1); \
... ... @@ -696,7 +696,7 @@ void glue(gen_op_, name) (void) \
696 696 int l1 = gen_new_label(); \
697 697 int l2 = gen_new_label(); \
698 698 \
699   - tcg_gen_brcond_tl(cond, cpu_T[0], tcg_const_tl(0), l1); \
  699 + tcg_gen_brcondi_tl(cond, cpu_T[0], 0, l1); \
700 700 tcg_gen_movi_tl(cpu_T[0], 0); \
701 701 tcg_gen_br(l2); \
702 702 gen_set_label(l1); \
... ... @@ -831,10 +831,10 @@ static inline void gen_op_addr_add (void)
831 831  
832 832 tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags));
833 833 tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU);
834   - tcg_gen_brcond_i32(TCG_COND_NE, r_tmp, tcg_const_i32(MIPS_HFLAG_UM), l1);
  834 + tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1);
835 835 tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status));
836 836 tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX));
837   - tcg_gen_brcond_i32(TCG_COND_NE, r_tmp, tcg_const_i32(0), l1);
  837 + tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1);
838 838 tcg_gen_ext32s_i64(cpu_T[0], cpu_T[0]);
839 839 gen_set_label(l1);
840 840 dead_tmp(r_tmp);
... ... @@ -995,7 +995,7 @@ void inline op_ldst_##insn(DisasContext *ctx) \
995 995 int l3 = gen_new_label(); \
996 996 \
997 997 tcg_gen_andi_tl(r_tmp, cpu_T[0], almask); \
998   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp, tcg_const_tl(0), l1); \
  998 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp, 0, l1); \
999 999 tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUState, CP0_BadVAddr)); \
1000 1000 generate_exception(ctx, EXCP_AdES); \
1001 1001 gen_set_label(l1); \
... ... @@ -1296,7 +1296,7 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc,
1296 1296 tcg_gen_xori_tl(r_tmp2, cpu_T[0], uimm);
1297 1297 tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
1298 1298 tcg_gen_shri_tl(r_tmp1, r_tmp1, 31);
1299   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
  1299 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
1300 1300 /* operands of same sign, result different sign */
1301 1301 generate_exception(ctx, EXCP_OVERFLOW);
1302 1302 gen_set_label(l1);
... ... @@ -1327,7 +1327,7 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc,
1327 1327 tcg_gen_xori_tl(r_tmp2, cpu_T[0], uimm);
1328 1328 tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
1329 1329 tcg_gen_shri_tl(r_tmp1, r_tmp1, 63);
1330   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
  1330 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
1331 1331 /* operands of same sign, result different sign */
1332 1332 generate_exception(ctx, EXCP_OVERFLOW);
1333 1333 gen_set_label(l1);
... ... @@ -1539,7 +1539,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1539 1539 tcg_gen_xor_tl(r_tmp2, cpu_T[0], cpu_T[1]);
1540 1540 tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
1541 1541 tcg_gen_shri_tl(r_tmp1, r_tmp1, 31);
1542   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
  1542 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
1543 1543 /* operands of same sign, result different sign */
1544 1544 generate_exception(ctx, EXCP_OVERFLOW);
1545 1545 gen_set_label(l1);
... ... @@ -1570,7 +1570,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1570 1570 tcg_gen_xor_tl(r_tmp1, r_tmp1, cpu_T[0]);
1571 1571 tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
1572 1572 tcg_gen_shri_tl(r_tmp1, r_tmp1, 31);
1573   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
  1573 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
1574 1574 /* operands of different sign, first operand and result different sign */
1575 1575 generate_exception(ctx, EXCP_OVERFLOW);
1576 1576 gen_set_label(l1);
... ... @@ -1602,7 +1602,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1602 1602 tcg_gen_xor_tl(r_tmp2, cpu_T[0], cpu_T[1]);
1603 1603 tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
1604 1604 tcg_gen_shri_tl(r_tmp1, r_tmp1, 63);
1605   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
  1605 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
1606 1606 /* operands of same sign, result different sign */
1607 1607 generate_exception(ctx, EXCP_OVERFLOW);
1608 1608 gen_set_label(l1);
... ... @@ -1627,7 +1627,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1627 1627 tcg_gen_xor_tl(r_tmp1, r_tmp1, cpu_T[0]);
1628 1628 tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
1629 1629 tcg_gen_shri_tl(r_tmp1, r_tmp1, 63);
1630   - tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
  1630 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
1631 1631 /* operands of different sign, first operand and result different sign */
1632 1632 generate_exception(ctx, EXCP_OVERFLOW);
1633 1633 gen_set_label(l1);
... ... @@ -1675,7 +1675,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1675 1675 {
1676 1676 int l1 = gen_new_label();
1677 1677  
1678   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
  1678 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1679 1679 gen_store_gpr(cpu_T[0], rd);
1680 1680 gen_set_label(l1);
1681 1681 }
... ... @@ -1685,7 +1685,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1685 1685 {
1686 1686 int l1 = gen_new_label();
1687 1687  
1688   - tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[1], tcg_const_tl(0), l1);
  1688 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[1], 0, l1);
1689 1689 gen_store_gpr(cpu_T[0], rd);
1690 1690 gen_set_label(l1);
1691 1691 }
... ... @@ -1722,7 +1722,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1722 1722 int l2 = gen_new_label();
1723 1723  
1724 1724 tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0x1f);
1725   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
  1725 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
1726 1726 {
1727 1727 TCGv r_tmp1 = new_tmp();
1728 1728 TCGv r_tmp2 = new_tmp();
... ... @@ -1784,7 +1784,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1784 1784 int l2 = gen_new_label();
1785 1785  
1786 1786 tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0x3f);
1787   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
  1787 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
1788 1788 {
1789 1789 TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_TL);
1790 1790  
... ... @@ -1873,7 +1873,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1873 1873 {
1874 1874 int l1 = gen_new_label();
1875 1875  
1876   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
  1876 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1877 1877 {
1878 1878 TCGv r_tmp1 = new_tmp();
1879 1879 TCGv r_tmp2 = new_tmp();
... ... @@ -1907,7 +1907,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1907 1907 {
1908 1908 int l1 = gen_new_label();
1909 1909  
1910   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
  1910 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1911 1911 {
1912 1912 TCGv r_tmp1 = new_tmp();
1913 1913 TCGv r_tmp2 = new_tmp();
... ... @@ -1950,7 +1950,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1950 1950 {
1951 1951 int l1 = gen_new_label();
1952 1952  
1953   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
  1953 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1954 1954 {
1955 1955 TCGv r_tc_off = new_tmp();
1956 1956 TCGv r_tc_off_tl = tcg_temp_new(TCG_TYPE_TL);
... ... @@ -1958,8 +1958,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1958 1958 int l2 = gen_new_label();
1959 1959 int l3 = gen_new_label();
1960 1960  
1961   - tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[0], tcg_const_tl(1ULL << 63), l2);
1962   - tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[1], tcg_const_tl(-1ULL), l2);
  1961 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[0], 1ULL << 63, l2);
  1962 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[1], -1ULL, l2);
1963 1963 tcg_gen_div_i64(cpu_T[0], cpu_T[0], cpu_T[1]);
1964 1964 tcg_gen_movi_tl(cpu_T[1], 0);
1965 1965 tcg_gen_br(l3);
... ... @@ -1984,7 +1984,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1984 1984 {
1985 1985 int l1 = gen_new_label();
1986 1986  
1987   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
  1987 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1988 1988 {
1989 1989 TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
1990 1990 TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
... ... @@ -5569,7 +5569,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
5569 5569 tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
5570 5570 tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
5571 5571 tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
5572   - tcg_gen_brcond_i32(cond, r_tmp, tcg_const_i32(0), l1);
  5572 + tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
5573 5573 tcg_gen_mov_tl(t0, t1);
5574 5574 gen_set_label(l1);
5575 5575 dead_tmp(r_tmp);
... ... @@ -6656,7 +6656,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
6656 6656  
6657 6657 MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4);
6658 6658 tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
6659   - tcg_gen_brcond_tl(TCG_COND_NE, r_tmp, tcg_const_tl(0), l1);
  6659 + tcg_gen_brcondi_tl(TCG_COND_NE, r_tmp, 0, l1);
6660 6660 gen_op_save_state(ctx->hflags & ~MIPS_HFLAG_BMASK);
6661 6661 gen_goto_tb(ctx, 1, ctx->pc + 4);
6662 6662 gen_set_label(l1);
... ... @@ -7214,7 +7214,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
7214 7214 int l1 = gen_new_label();
7215 7215  
7216 7216 tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
7217   - tcg_gen_brcond_tl(TCG_COND_NE, r_tmp, tcg_const_tl(0), l1);
  7217 + tcg_gen_brcondi_tl(TCG_COND_NE, r_tmp, 0, l1);
7218 7218 gen_goto_tb(ctx, 1, ctx->pc + 4);
7219 7219 gen_set_label(l1);
7220 7220 gen_goto_tb(ctx, 0, ctx->btarget);
... ...
target-sparc/translate.c
  View file @cb63669
... ... @@ -304,11 +304,11 @@ static inline void gen_cc_NZ_icc(TCGv dst)
304 304 l2 = gen_new_label();
305 305 r_temp = tcg_temp_new(TCG_TYPE_TL);
306 306 tcg_gen_andi_tl(r_temp, dst, 0xffffffffULL);
307   - tcg_gen_brcond_tl(TCG_COND_NE, r_temp, tcg_const_tl(0), l1);
  307 + tcg_gen_brcondi_tl(TCG_COND_NE, r_temp, 0, l1);
308 308 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_ZERO);
309 309 gen_set_label(l1);
310 310 tcg_gen_ext_i32_tl(r_temp, dst);
311   - tcg_gen_brcond_tl(TCG_COND_GE, r_temp, tcg_const_tl(0), l2);
  311 + tcg_gen_brcondi_tl(TCG_COND_GE, r_temp, 0, l2);
312 312 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_NEG);
313 313 gen_set_label(l2);
314 314 }
... ... @@ -320,10 +320,10 @@ static inline void gen_cc_NZ_xcc(TCGv dst)
320 320  
321 321 l1 = gen_new_label();
322 322 l2 = gen_new_label();
323   - tcg_gen_brcond_tl(TCG_COND_NE, dst, tcg_const_tl(0), l1);
  323 + tcg_gen_brcondi_tl(TCG_COND_NE, dst, 0, l1);
324 324 tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_ZERO);
325 325 gen_set_label(l1);
326   - tcg_gen_brcond_tl(TCG_COND_GE, dst, tcg_const_tl(0), l2);
  326 + tcg_gen_brcondi_tl(TCG_COND_GE, dst, 0, l2);
327 327 tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_NEG);
328 328 gen_set_label(l2);
329 329 }
... ... @@ -407,7 +407,7 @@ static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2)
407 407 tcg_gen_xor_tl(cpu_tmp0, src1, dst);
408 408 tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
409 409 tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
410   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);
  410 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1);
411 411 tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
412 412 gen_set_label(l1);
413 413 }
... ... @@ -419,7 +419,7 @@ static inline void gen_cc_V_tag(TCGv src1, TCGv src2)
419 419 l1 = gen_new_label();
420 420 tcg_gen_or_tl(cpu_tmp0, src1, src2);
421 421 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
422   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
  422 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
423 423 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
424 424 gen_set_label(l1);
425 425 }
... ... @@ -431,7 +431,7 @@ static inline void gen_tag_tv(TCGv src1, TCGv src2)
431 431 l1 = gen_new_label();
432 432 tcg_gen_or_tl(cpu_tmp0, src1, src2);
433 433 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
434   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
  434 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
435 435 tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
436 436 gen_set_label(l1);
437 437 }
... ... @@ -593,7 +593,7 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)
593 593 tcg_gen_xor_tl(cpu_tmp0, src1, dst);
594 594 tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
595 595 tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
596   - tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);
  596 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1);
597 597 tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
598 598 gen_set_label(l1);
599 599 }
... ... @@ -696,7 +696,7 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
696 696 tcg_gen_trunc_tl_i32(r_temp2, r_temp);
697 697 tcg_gen_andi_i32(r_temp2, r_temp2, 0x1);
698 698 tcg_gen_mov_tl(cpu_cc_src2, src2);
699   - tcg_gen_brcond_i32(TCG_COND_NE, r_temp2, tcg_const_i32(0), l1);
  699 + tcg_gen_brcondi_i32(TCG_COND_NE, r_temp2, 0, l1);
700 700 tcg_gen_movi_tl(cpu_cc_src2, 0);
701 701 gen_set_label(l1);
702 702  
... ... @@ -779,7 +779,7 @@ static inline void gen_trap_ifdivzero_tl(TCGv divisor)
779 779 int l1;
780 780  
781 781 l1 = gen_new_label();
782   - tcg_gen_brcond_tl(TCG_COND_NE, divisor, tcg_const_tl(0), l1);
  782 + tcg_gen_brcondi_tl(TCG_COND_NE, divisor, 0, l1);
783 783 tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_DIV_ZERO));
784 784 gen_set_label(l1);
785 785 }
... ... @@ -793,8 +793,8 @@ static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2)
793 793 tcg_gen_mov_tl(cpu_cc_src, src1);
794 794 tcg_gen_mov_tl(cpu_cc_src2, src2);
795 795 gen_trap_ifdivzero_tl(src2);
796   - tcg_gen_brcond_tl(TCG_COND_NE, cpu_cc_src, tcg_const_tl(INT64_MIN), l1);
797   - tcg_gen_brcond_tl(TCG_COND_NE, cpu_cc_src2, tcg_const_tl(-1), l1);
  796 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src, INT64_MIN, l1);
  797 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src2, -1, l1);
798 798 tcg_gen_movi_i64(dst, INT64_MIN);
799 799 tcg_gen_br(l2);
800 800 gen_set_label(l1);
... ... @@ -812,7 +812,7 @@ static inline void gen_op_div_cc(TCGv dst)
812 812 gen_cc_NZ_icc(cpu_cc_dst);
813 813 l1 = gen_new_label();
814 814 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, cc_src2));
815   - tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
  815 + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
816 816 tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
817 817 gen_set_label(l1);
818 818 }
... ... @@ -1107,7 +1107,7 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1,
1107 1107  
1108 1108 l1 = gen_new_label();
1109 1109  
1110   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
  1110 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
1111 1111  
1112 1112 gen_goto_tb(dc, 0, pc1, pc1 + 4);
1113 1113  
... ... @@ -1122,7 +1122,7 @@ static inline void gen_branch_a(DisasContext *dc, target_ulong pc1,
1122 1122  
1123 1123 l1 = gen_new_label();
1124 1124  
1125   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
  1125 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
1126 1126  
1127 1127 gen_goto_tb(dc, 0, pc2, pc1);
1128 1128  
... ... @@ -1138,7 +1138,7 @@ static inline void gen_generic_branch(target_ulong npc1, target_ulong npc2,
1138 1138 l1 = gen_new_label();
1139 1139 l2 = gen_new_label();
1140 1140  
1141   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
  1141 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
1142 1142  
1143 1143 tcg_gen_movi_tl(cpu_npc, npc1);
1144 1144 tcg_gen_br(l2);
... ... @@ -1349,7 +1349,7 @@ static inline void gen_cond_reg(TCGv r_dst, int cond, TCGv r_src)
1349 1349  
1350 1350 l1 = gen_new_label();
1351 1351 tcg_gen_movi_tl(r_dst, 0);
1352   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], r_src, tcg_const_tl(0), l1);
  1352 + tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], r_src, 0, l1);
1353 1353 tcg_gen_movi_tl(r_dst, 1);
1354 1354 gen_set_label(l1);
1355 1355 }
... ... @@ -2603,8 +2603,8 @@ static void disas_sparc_insn(DisasContext * dc)
2603 2603 l1 = gen_new_label();
2604 2604 cond = GET_FIELD_SP(insn, 14, 17);
2605 2605 cpu_src1 = get_src1(insn, cpu_src1);
2606   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
2607   - tcg_const_tl(0), l1);
  2606 + tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
  2607 + 0, l1);
2608 2608 gen_op_load_fpr_FT0(rs2);
2609 2609 gen_op_store_FT0_fpr(rd);
2610 2610 gen_set_label(l1);
... ... @@ -2615,8 +2615,8 @@ static void disas_sparc_insn(DisasContext * dc)
2615 2615 l1 = gen_new_label();
2616 2616 cond = GET_FIELD_SP(insn, 14, 17);
2617 2617 cpu_src1 = get_src1(insn, cpu_src1);
2618   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
2619   - tcg_const_tl(0), l1);
  2618 + tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
  2619 + 0, l1);
2620 2620 gen_op_load_fpr_DT0(DFPREG(rs2));
2621 2621 gen_op_store_DT0_fpr(DFPREG(rd));
2622 2622 gen_set_label(l1);
... ... @@ -2628,8 +2628,8 @@ static void disas_sparc_insn(DisasContext * dc)
2628 2628 l1 = gen_new_label();
2629 2629 cond = GET_FIELD_SP(insn, 14, 17);
2630 2630 cpu_src1 = get_src1(insn, cpu_src1);
2631   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
2632   - tcg_const_tl(0), l1);
  2631 + tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
  2632 + 0, l1);
2633 2633 gen_op_load_fpr_QT0(QFPREG(rs2));
2634 2634 gen_op_store_QT0_fpr(QFPREG(rd));
2635 2635 gen_set_label(l1);
... ... @@ -2647,8 +2647,8 @@ static void disas_sparc_insn(DisasContext * dc)
2647 2647 r_cond = tcg_temp_new(TCG_TYPE_TL); \
2648 2648 cond = GET_FIELD_SP(insn, 14, 17); \
2649 2649 gen_fcond(r_cond, fcc, cond); \
2650   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, \
2651   - tcg_const_tl(0), l1); \
  2650 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \
  2651 + 0, l1); \
2652 2652 glue(glue(gen_op_load_fpr_, size_FDQ), T0) \
2653 2653 (glue(size_FDQ, FPREG(rs2))); \
2654 2654 glue(glue(gen_op_store_, size_FDQ), T0_fpr) \
... ... @@ -2705,8 +2705,8 @@ static void disas_sparc_insn(DisasContext * dc)
2705 2705 r_cond = tcg_temp_new(TCG_TYPE_TL); \
2706 2706 cond = GET_FIELD_SP(insn, 14, 17); \
2707 2707 gen_cond(r_cond, icc, cond); \
2708   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, \
2709   - tcg_const_tl(0), l1); \
  2708 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \
  2709 + 0, l1); \
2710 2710 glue(glue(gen_op_load_fpr_, size_FDQ), T0) \
2711 2711 (glue(size_FDQ, FPREG(rs2))); \
2712 2712 glue(glue(gen_op_store_, size_FDQ), T0_fpr) \
... ... @@ -3411,8 +3411,7 @@ static void disas_sparc_insn(DisasContext * dc)
3411 3411  
3412 3412 l1 = gen_new_label();
3413 3413  
3414   - tcg_gen_brcond_tl(TCG_COND_EQ, r_cond,
3415   - tcg_const_tl(0), l1);
  3414 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
3416 3415 if (IS_IMM) { /* immediate */
3417 3416 rs2 = GET_FIELD_SPs(insn, 0, 10);
3418 3417 gen_movl_TN_reg(rd, tcg_const_tl((int)rs2));
... ... @@ -3444,8 +3443,8 @@ static void disas_sparc_insn(DisasContext * dc)
3444 3443  
3445 3444 l1 = gen_new_label();
3446 3445  
3447   - tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
3448   - tcg_const_tl(0), l1);
  3446 + tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond],
  3447 + cpu_src1, 0, l1);
3449 3448 if (IS_IMM) { /* immediate */
3450 3449 rs2 = GET_FIELD_SPs(insn, 0, 9);
3451 3450 gen_movl_TN_reg(rd, tcg_const_tl((int)rs2));
... ...
tcg/tcg-op.h
  View file @cb63669
... ... @@ -491,6 +491,14 @@ static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2,
491 491 tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
492 492 }
493 493  
  494 +static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2,
  495 + int label_index)
  496 +{
  497 + TCGv t0 = tcg_const_i32(arg2);
  498 + tcg_gen_brcond_i32(cond, arg1, t0, label_index);
  499 + tcg_temp_free(t0);
  500 +}
  501 +
494 502 static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2)
495 503 {
496 504 tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2);
... ... @@ -1063,6 +1071,14 @@ static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
1063 1071  
1064 1072 #endif
1065 1073  
  1074 +static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
  1075 + int label_index)
  1076 +{
  1077 + TCGv t0 = tcg_const_i64(arg2);
  1078 + tcg_gen_brcond_i64(cond, arg1, t0, label_index);
  1079 + tcg_temp_free(t0);
  1080 +}
  1081 +
1066 1082 /***************************************/
1067 1083 /* optional operations */
1068 1084  
... ... @@ -1614,6 +1630,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1614 1630 #define tcg_gen_sar_tl tcg_gen_sar_i64
1615 1631 #define tcg_gen_sari_tl tcg_gen_sari_i64
1616 1632 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
  1633 +#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1617 1634 #define tcg_gen_mul_tl tcg_gen_mul_i64
1618 1635 #define tcg_gen_muli_tl tcg_gen_muli_i64
1619 1636 #define tcg_gen_discard_tl tcg_gen_discard_i64
... ... @@ -1664,6 +1681,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1664 1681 #define tcg_gen_sar_tl tcg_gen_sar_i32
1665 1682 #define tcg_gen_sari_tl tcg_gen_sari_i32
1666 1683 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
  1684 +#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1667 1685 #define tcg_gen_mul_tl tcg_gen_mul_i32
1668 1686 #define tcg_gen_muli_tl tcg_gen_muli_i32
1669 1687 #define tcg_gen_discard_tl tcg_gen_discard_i32
... ...