Commit c96a29cdef7659ae7c4a816206915896a8f69e39
1 parent
4b7df22f
Fix MIPS counter / compare interrupt (Ralf Baechle
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1550 c046a42c-6fe2-441c-8c8c-71466251a162
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4 additions
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2 deletions
hw/mips_r4k.c
... | ... | @@ -72,7 +72,8 @@ void cpu_mips_store_count (CPUState *env, uint32_t value) |
72 | 72 | void cpu_mips_store_compare (CPUState *env, uint32_t value) |
73 | 73 | { |
74 | 74 | cpu_mips_update_count(env, cpu_mips_get_count(env), value); |
75 | - pic_set_irq(5, 0); | |
75 | + cpu_single_env->CP0_Cause &= ~0x00008000; | |
76 | + cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); | |
76 | 77 | } |
77 | 78 | |
78 | 79 | static void mips_timer_cb (void *opaque) |
... | ... | @@ -86,7 +87,8 @@ static void mips_timer_cb (void *opaque) |
86 | 87 | } |
87 | 88 | #endif |
88 | 89 | cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare); |
89 | - pic_set_irq(5, 1); | |
90 | + cpu_single_env->CP0_Cause |= 0x00008000; | |
91 | + cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); | |
90 | 92 | } |
91 | 93 | |
92 | 94 | void cpu_mips_clock_init (CPUState *env) | ... | ... |