gwj / at91sam9263 · Commits

Commit c905fdacb4da8c48d6b62fab8ed4094a033c3b0f

Authored by aurel32
1 parent 4e2474d6

target-mips: optimize gen_flt3_arith() 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7045 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 16 additions and 18 deletions
target-mips/translate.c
  View file @c905fda
... ... @@ -7259,39 +7259,37 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
7259 7259 check_cp1_64bitmode(ctx);
7260 7260 {
7261 7261 TCGv t0 = tcg_temp_local_new();
7262   - TCGv_i32 fp0 = tcg_temp_local_new_i32();
7263   - TCGv_i32 fph0 = tcg_temp_local_new_i32();
7264   - TCGv_i32 fp1 = tcg_temp_local_new_i32();
7265   - TCGv_i32 fph1 = tcg_temp_local_new_i32();
  7262 + TCGv_i32 fp = tcg_temp_new_i32();
  7263 + TCGv_i32 fph = tcg_temp_new_i32();
7266 7264 int l1 = gen_new_label();
7267 7265 int l2 = gen_new_label();
7268 7266  
7269 7267 gen_load_gpr(t0, fr);
7270 7268 tcg_gen_andi_tl(t0, t0, 0x7);
7271   - gen_load_fpr32(fp0, fs);
7272   - gen_load_fpr32h(fph0, fs);
7273   - gen_load_fpr32(fp1, ft);
7274   - gen_load_fpr32h(fph1, ft);
7275 7269  
7276 7270 tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
7277   - gen_store_fpr32(fp0, fd);
7278   - gen_store_fpr32h(fph0, fd);
  7271 + gen_load_fpr32(fp, fs);
  7272 + gen_load_fpr32h(fph, fs);
  7273 + gen_store_fpr32(fp, fd);
  7274 + gen_store_fpr32h(fph, fd);
7279 7275 tcg_gen_br(l2);
7280 7276 gen_set_label(l1);
7281 7277 tcg_gen_brcondi_tl(TCG_COND_NE, t0, 4, l2);
7282 7278 tcg_temp_free(t0);
7283 7279 #ifdef TARGET_WORDS_BIGENDIAN
7284   - gen_store_fpr32(fph1, fd);
7285   - gen_store_fpr32h(fp0, fd);
  7280 + gen_load_fpr32(fp, fs);
  7281 + gen_load_fpr32h(fph, ft);
  7282 + gen_store_fpr32h(fp, fd);
  7283 + gen_store_fpr32(fph, fd);
7286 7284 #else
7287   - gen_store_fpr32(fph0, fd);
7288   - gen_store_fpr32h(fp1, fd);
  7285 + gen_load_fpr32h(fph, fs);
  7286 + gen_load_fpr32(fp, ft);
  7287 + gen_store_fpr32(fph, fd);
  7288 + gen_store_fpr32h(fp, fd);
7289 7289 #endif
7290 7290 gen_set_label(l2);
7291   - tcg_temp_free_i32(fp0);
7292   - tcg_temp_free_i32(fph0);
7293   - tcg_temp_free_i32(fp1);
7294   - tcg_temp_free_i32(fph1);
  7291 + tcg_temp_free_i32(fp);
  7292 + tcg_temp_free_i32(fph);
7295 7293 }
7296 7294 opn = "alnv.ps";
7297 7295 break;
... ...