Commit c8b3532d8a44db723a07b6eb2745568c86490f1c
1 parent
0ccff151
target-ppc: Add XML files for PowerPC registers
These files are nearly identical to the XML files provided with GDB.
The only difference is that power-{fpu,spe}.xml do not assign register
numbers; the internal QEMU machinery takes care of that.
Define gdb_xml_files for ppc targets in configure as well.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6420 c046a42c-6fe2-441c-8c8c-71466251a162
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6 changed files
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248 additions
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0 deletions
configure
| @@ -1638,6 +1638,7 @@ case "$target_cpu" in | @@ -1638,6 +1638,7 @@ case "$target_cpu" in | ||
| 1638 | echo "TARGET_ARCH=ppc" >> $config_mak | 1638 | echo "TARGET_ARCH=ppc" >> $config_mak |
| 1639 | echo "#define TARGET_ARCH \"ppc\"" >> $config_h | 1639 | echo "#define TARGET_ARCH \"ppc\"" >> $config_h |
| 1640 | echo "#define TARGET_PPC 1" >> $config_h | 1640 | echo "#define TARGET_PPC 1" >> $config_h |
| 1641 | + gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml power-spe.xml" | ||
| 1641 | ;; | 1642 | ;; |
| 1642 | ppcemb) | 1643 | ppcemb) |
| 1643 | echo "TARGET_ARCH=ppcemb" >> $config_mak | 1644 | echo "TARGET_ARCH=ppcemb" >> $config_mak |
| @@ -1650,6 +1651,7 @@ case "$target_cpu" in | @@ -1650,6 +1651,7 @@ case "$target_cpu" in | ||
| 1650 | echo "KVM_CFLAGS=$kvm_cflags" >> $config_mak | 1651 | echo "KVM_CFLAGS=$kvm_cflags" >> $config_mak |
| 1651 | echo "#define CONFIG_KVM 1" >> $config_h | 1652 | echo "#define CONFIG_KVM 1" >> $config_h |
| 1652 | fi | 1653 | fi |
| 1654 | + gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml power-spe.xml" | ||
| 1653 | ;; | 1655 | ;; |
| 1654 | ppc64) | 1656 | ppc64) |
| 1655 | echo "TARGET_ARCH=ppc64" >> $config_mak | 1657 | echo "TARGET_ARCH=ppc64" >> $config_mak |
| @@ -1657,6 +1659,7 @@ case "$target_cpu" in | @@ -1657,6 +1659,7 @@ case "$target_cpu" in | ||
| 1657 | echo "#define TARGET_ARCH \"ppc64\"" >> $config_h | 1659 | echo "#define TARGET_ARCH \"ppc64\"" >> $config_h |
| 1658 | echo "#define TARGET_PPC 1" >> $config_h | 1660 | echo "#define TARGET_PPC 1" >> $config_h |
| 1659 | echo "#define TARGET_PPC64 1" >> $config_h | 1661 | echo "#define TARGET_PPC64 1" >> $config_h |
| 1662 | + gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" | ||
| 1660 | ;; | 1663 | ;; |
| 1661 | ppc64abi32) | 1664 | ppc64abi32) |
| 1662 | echo "TARGET_ARCH=ppc64" >> $config_mak | 1665 | echo "TARGET_ARCH=ppc64" >> $config_mak |
| @@ -1666,6 +1669,7 @@ case "$target_cpu" in | @@ -1666,6 +1669,7 @@ case "$target_cpu" in | ||
| 1666 | echo "#define TARGET_PPC 1" >> $config_h | 1669 | echo "#define TARGET_PPC 1" >> $config_h |
| 1667 | echo "#define TARGET_PPC64 1" >> $config_h | 1670 | echo "#define TARGET_PPC64 1" >> $config_h |
| 1668 | echo "#define TARGET_ABI32 1" >> $config_h | 1671 | echo "#define TARGET_ABI32 1" >> $config_h |
| 1672 | + gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" | ||
| 1669 | ;; | 1673 | ;; |
| 1670 | sh4|sh4eb) | 1674 | sh4|sh4eb) |
| 1671 | echo "TARGET_ARCH=sh4" >> $config_mak | 1675 | echo "TARGET_ARCH=sh4" >> $config_mak |
gdb-xml/power-altivec.xml
0 → 100644
| 1 | +<?xml version="1.0"?> | ||
| 2 | +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. | ||
| 3 | + | ||
| 4 | + Copying and distribution of this file, with or without modification, | ||
| 5 | + are permitted in any medium without royalty provided the copyright | ||
| 6 | + notice and this notice are preserved. --> | ||
| 7 | + | ||
| 8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
| 9 | +<feature name="org.gnu.gdb.power.altivec"> | ||
| 10 | + <vector id="v4f" type="ieee_single" count="4"/> | ||
| 11 | + <vector id="v4i32" type="int32" count="4"/> | ||
| 12 | + <vector id="v8i16" type="int16" count="8"/> | ||
| 13 | + <vector id="v16i8" type="int8" count="16"/> | ||
| 14 | + <union id="vec128"> | ||
| 15 | + <field name="uint128" type="uint128"/> | ||
| 16 | + <field name="v4_float" type="v4f"/> | ||
| 17 | + <field name="v4_int32" type="v4i32"/> | ||
| 18 | + <field name="v8_int16" type="v8i16"/> | ||
| 19 | + <field name="v16_int8" type="v16i8"/> | ||
| 20 | + </union> | ||
| 21 | + | ||
| 22 | + <reg name="vr0" bitsize="128" type="vec128"/> | ||
| 23 | + <reg name="vr1" bitsize="128" type="vec128"/> | ||
| 24 | + <reg name="vr2" bitsize="128" type="vec128"/> | ||
| 25 | + <reg name="vr3" bitsize="128" type="vec128"/> | ||
| 26 | + <reg name="vr4" bitsize="128" type="vec128"/> | ||
| 27 | + <reg name="vr5" bitsize="128" type="vec128"/> | ||
| 28 | + <reg name="vr6" bitsize="128" type="vec128"/> | ||
| 29 | + <reg name="vr7" bitsize="128" type="vec128"/> | ||
| 30 | + <reg name="vr8" bitsize="128" type="vec128"/> | ||
| 31 | + <reg name="vr9" bitsize="128" type="vec128"/> | ||
| 32 | + <reg name="vr10" bitsize="128" type="vec128"/> | ||
| 33 | + <reg name="vr11" bitsize="128" type="vec128"/> | ||
| 34 | + <reg name="vr12" bitsize="128" type="vec128"/> | ||
| 35 | + <reg name="vr13" bitsize="128" type="vec128"/> | ||
| 36 | + <reg name="vr14" bitsize="128" type="vec128"/> | ||
| 37 | + <reg name="vr15" bitsize="128" type="vec128"/> | ||
| 38 | + <reg name="vr16" bitsize="128" type="vec128"/> | ||
| 39 | + <reg name="vr17" bitsize="128" type="vec128"/> | ||
| 40 | + <reg name="vr18" bitsize="128" type="vec128"/> | ||
| 41 | + <reg name="vr19" bitsize="128" type="vec128"/> | ||
| 42 | + <reg name="vr20" bitsize="128" type="vec128"/> | ||
| 43 | + <reg name="vr21" bitsize="128" type="vec128"/> | ||
| 44 | + <reg name="vr22" bitsize="128" type="vec128"/> | ||
| 45 | + <reg name="vr23" bitsize="128" type="vec128"/> | ||
| 46 | + <reg name="vr24" bitsize="128" type="vec128"/> | ||
| 47 | + <reg name="vr25" bitsize="128" type="vec128"/> | ||
| 48 | + <reg name="vr26" bitsize="128" type="vec128"/> | ||
| 49 | + <reg name="vr27" bitsize="128" type="vec128"/> | ||
| 50 | + <reg name="vr28" bitsize="128" type="vec128"/> | ||
| 51 | + <reg name="vr29" bitsize="128" type="vec128"/> | ||
| 52 | + <reg name="vr30" bitsize="128" type="vec128"/> | ||
| 53 | + <reg name="vr31" bitsize="128" type="vec128"/> | ||
| 54 | + | ||
| 55 | + <reg name="vscr" bitsize="32" group="vector"/> | ||
| 56 | + <reg name="vrsave" bitsize="32" group="vector"/> | ||
| 57 | +</feature> |
gdb-xml/power-core.xml
0 → 100644
| 1 | +<?xml version="1.0"?> | ||
| 2 | +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. | ||
| 3 | + | ||
| 4 | + Copying and distribution of this file, with or without modification, | ||
| 5 | + are permitted in any medium without royalty provided the copyright | ||
| 6 | + notice and this notice are preserved. --> | ||
| 7 | + | ||
| 8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
| 9 | +<feature name="org.gnu.gdb.power.core"> | ||
| 10 | + <reg name="r0" bitsize="32" type="uint32"/> | ||
| 11 | + <reg name="r1" bitsize="32" type="uint32"/> | ||
| 12 | + <reg name="r2" bitsize="32" type="uint32"/> | ||
| 13 | + <reg name="r3" bitsize="32" type="uint32"/> | ||
| 14 | + <reg name="r4" bitsize="32" type="uint32"/> | ||
| 15 | + <reg name="r5" bitsize="32" type="uint32"/> | ||
| 16 | + <reg name="r6" bitsize="32" type="uint32"/> | ||
| 17 | + <reg name="r7" bitsize="32" type="uint32"/> | ||
| 18 | + <reg name="r8" bitsize="32" type="uint32"/> | ||
| 19 | + <reg name="r9" bitsize="32" type="uint32"/> | ||
| 20 | + <reg name="r10" bitsize="32" type="uint32"/> | ||
| 21 | + <reg name="r11" bitsize="32" type="uint32"/> | ||
| 22 | + <reg name="r12" bitsize="32" type="uint32"/> | ||
| 23 | + <reg name="r13" bitsize="32" type="uint32"/> | ||
| 24 | + <reg name="r14" bitsize="32" type="uint32"/> | ||
| 25 | + <reg name="r15" bitsize="32" type="uint32"/> | ||
| 26 | + <reg name="r16" bitsize="32" type="uint32"/> | ||
| 27 | + <reg name="r17" bitsize="32" type="uint32"/> | ||
| 28 | + <reg name="r18" bitsize="32" type="uint32"/> | ||
| 29 | + <reg name="r19" bitsize="32" type="uint32"/> | ||
| 30 | + <reg name="r20" bitsize="32" type="uint32"/> | ||
| 31 | + <reg name="r21" bitsize="32" type="uint32"/> | ||
| 32 | + <reg name="r22" bitsize="32" type="uint32"/> | ||
| 33 | + <reg name="r23" bitsize="32" type="uint32"/> | ||
| 34 | + <reg name="r24" bitsize="32" type="uint32"/> | ||
| 35 | + <reg name="r25" bitsize="32" type="uint32"/> | ||
| 36 | + <reg name="r26" bitsize="32" type="uint32"/> | ||
| 37 | + <reg name="r27" bitsize="32" type="uint32"/> | ||
| 38 | + <reg name="r28" bitsize="32" type="uint32"/> | ||
| 39 | + <reg name="r29" bitsize="32" type="uint32"/> | ||
| 40 | + <reg name="r30" bitsize="32" type="uint32"/> | ||
| 41 | + <reg name="r31" bitsize="32" type="uint32"/> | ||
| 42 | + | ||
| 43 | + <reg name="pc" bitsize="32" type="code_ptr" regnum="64"/> | ||
| 44 | + <reg name="msr" bitsize="32" type="uint32"/> | ||
| 45 | + <reg name="cr" bitsize="32" type="uint32"/> | ||
| 46 | + <reg name="lr" bitsize="32" type="code_ptr"/> | ||
| 47 | + <reg name="ctr" bitsize="32" type="uint32"/> | ||
| 48 | + <reg name="xer" bitsize="32" type="uint32"/> | ||
| 49 | +</feature> |
gdb-xml/power-fpu.xml
0 → 100644
| 1 | +<?xml version="1.0"?> | ||
| 2 | +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. | ||
| 3 | + | ||
| 4 | + Copying and distribution of this file, with or without modification, | ||
| 5 | + are permitted in any medium without royalty provided the copyright | ||
| 6 | + notice and this notice are preserved. --> | ||
| 7 | + | ||
| 8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
| 9 | +<feature name="org.gnu.gdb.power.fpu"> | ||
| 10 | + <reg name="f0" bitsize="64" type="ieee_double"/> | ||
| 11 | + <reg name="f1" bitsize="64" type="ieee_double"/> | ||
| 12 | + <reg name="f2" bitsize="64" type="ieee_double"/> | ||
| 13 | + <reg name="f3" bitsize="64" type="ieee_double"/> | ||
| 14 | + <reg name="f4" bitsize="64" type="ieee_double"/> | ||
| 15 | + <reg name="f5" bitsize="64" type="ieee_double"/> | ||
| 16 | + <reg name="f6" bitsize="64" type="ieee_double"/> | ||
| 17 | + <reg name="f7" bitsize="64" type="ieee_double"/> | ||
| 18 | + <reg name="f8" bitsize="64" type="ieee_double"/> | ||
| 19 | + <reg name="f9" bitsize="64" type="ieee_double"/> | ||
| 20 | + <reg name="f10" bitsize="64" type="ieee_double"/> | ||
| 21 | + <reg name="f11" bitsize="64" type="ieee_double"/> | ||
| 22 | + <reg name="f12" bitsize="64" type="ieee_double"/> | ||
| 23 | + <reg name="f13" bitsize="64" type="ieee_double"/> | ||
| 24 | + <reg name="f14" bitsize="64" type="ieee_double"/> | ||
| 25 | + <reg name="f15" bitsize="64" type="ieee_double"/> | ||
| 26 | + <reg name="f16" bitsize="64" type="ieee_double"/> | ||
| 27 | + <reg name="f17" bitsize="64" type="ieee_double"/> | ||
| 28 | + <reg name="f18" bitsize="64" type="ieee_double"/> | ||
| 29 | + <reg name="f19" bitsize="64" type="ieee_double"/> | ||
| 30 | + <reg name="f20" bitsize="64" type="ieee_double"/> | ||
| 31 | + <reg name="f21" bitsize="64" type="ieee_double"/> | ||
| 32 | + <reg name="f22" bitsize="64" type="ieee_double"/> | ||
| 33 | + <reg name="f23" bitsize="64" type="ieee_double"/> | ||
| 34 | + <reg name="f24" bitsize="64" type="ieee_double"/> | ||
| 35 | + <reg name="f25" bitsize="64" type="ieee_double"/> | ||
| 36 | + <reg name="f26" bitsize="64" type="ieee_double"/> | ||
| 37 | + <reg name="f27" bitsize="64" type="ieee_double"/> | ||
| 38 | + <reg name="f28" bitsize="64" type="ieee_double"/> | ||
| 39 | + <reg name="f29" bitsize="64" type="ieee_double"/> | ||
| 40 | + <reg name="f30" bitsize="64" type="ieee_double"/> | ||
| 41 | + <reg name="f31" bitsize="64" type="ieee_double"/> | ||
| 42 | + | ||
| 43 | + <reg name="fpscr" bitsize="32" group="float"/> | ||
| 44 | +</feature> |
gdb-xml/power-spe.xml
0 → 100644
| 1 | +<?xml version="1.0"?> | ||
| 2 | +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. | ||
| 3 | + | ||
| 4 | + Copying and distribution of this file, with or without modification, | ||
| 5 | + are permitted in any medium without royalty provided the copyright | ||
| 6 | + notice and this notice are preserved. --> | ||
| 7 | + | ||
| 8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
| 9 | +<feature name="org.gnu.gdb.power.spe"> | ||
| 10 | + <reg name="ev0h" bitsize="32"/> | ||
| 11 | + <reg name="ev1h" bitsize="32"/> | ||
| 12 | + <reg name="ev2h" bitsize="32"/> | ||
| 13 | + <reg name="ev3h" bitsize="32"/> | ||
| 14 | + <reg name="ev4h" bitsize="32"/> | ||
| 15 | + <reg name="ev5h" bitsize="32"/> | ||
| 16 | + <reg name="ev6h" bitsize="32"/> | ||
| 17 | + <reg name="ev7h" bitsize="32"/> | ||
| 18 | + <reg name="ev8h" bitsize="32"/> | ||
| 19 | + <reg name="ev9h" bitsize="32"/> | ||
| 20 | + <reg name="ev10h" bitsize="32"/> | ||
| 21 | + <reg name="ev11h" bitsize="32"/> | ||
| 22 | + <reg name="ev12h" bitsize="32"/> | ||
| 23 | + <reg name="ev13h" bitsize="32"/> | ||
| 24 | + <reg name="ev14h" bitsize="32"/> | ||
| 25 | + <reg name="ev15h" bitsize="32"/> | ||
| 26 | + <reg name="ev16h" bitsize="32"/> | ||
| 27 | + <reg name="ev17h" bitsize="32"/> | ||
| 28 | + <reg name="ev18h" bitsize="32"/> | ||
| 29 | + <reg name="ev19h" bitsize="32"/> | ||
| 30 | + <reg name="ev20h" bitsize="32"/> | ||
| 31 | + <reg name="ev21h" bitsize="32"/> | ||
| 32 | + <reg name="ev22h" bitsize="32"/> | ||
| 33 | + <reg name="ev23h" bitsize="32"/> | ||
| 34 | + <reg name="ev24h" bitsize="32"/> | ||
| 35 | + <reg name="ev25h" bitsize="32"/> | ||
| 36 | + <reg name="ev26h" bitsize="32"/> | ||
| 37 | + <reg name="ev27h" bitsize="32"/> | ||
| 38 | + <reg name="ev28h" bitsize="32"/> | ||
| 39 | + <reg name="ev29h" bitsize="32"/> | ||
| 40 | + <reg name="ev30h" bitsize="32"/> | ||
| 41 | + <reg name="ev31h" bitsize="32"/> | ||
| 42 | + | ||
| 43 | + <reg name="acc" bitsize="64"/> | ||
| 44 | + <reg name="spefscr" bitsize="32"/> | ||
| 45 | +</feature> |
gdb-xml/power64-core.xml
0 → 100644
| 1 | +<?xml version="1.0"?> | ||
| 2 | +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. | ||
| 3 | + | ||
| 4 | + Copying and distribution of this file, with or without modification, | ||
| 5 | + are permitted in any medium without royalty provided the copyright | ||
| 6 | + notice and this notice are preserved. --> | ||
| 7 | + | ||
| 8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
| 9 | +<feature name="org.gnu.gdb.power.core"> | ||
| 10 | + <reg name="r0" bitsize="64" type="uint64"/> | ||
| 11 | + <reg name="r1" bitsize="64" type="uint64"/> | ||
| 12 | + <reg name="r2" bitsize="64" type="uint64"/> | ||
| 13 | + <reg name="r3" bitsize="64" type="uint64"/> | ||
| 14 | + <reg name="r4" bitsize="64" type="uint64"/> | ||
| 15 | + <reg name="r5" bitsize="64" type="uint64"/> | ||
| 16 | + <reg name="r6" bitsize="64" type="uint64"/> | ||
| 17 | + <reg name="r7" bitsize="64" type="uint64"/> | ||
| 18 | + <reg name="r8" bitsize="64" type="uint64"/> | ||
| 19 | + <reg name="r9" bitsize="64" type="uint64"/> | ||
| 20 | + <reg name="r10" bitsize="64" type="uint64"/> | ||
| 21 | + <reg name="r11" bitsize="64" type="uint64"/> | ||
| 22 | + <reg name="r12" bitsize="64" type="uint64"/> | ||
| 23 | + <reg name="r13" bitsize="64" type="uint64"/> | ||
| 24 | + <reg name="r14" bitsize="64" type="uint64"/> | ||
| 25 | + <reg name="r15" bitsize="64" type="uint64"/> | ||
| 26 | + <reg name="r16" bitsize="64" type="uint64"/> | ||
| 27 | + <reg name="r17" bitsize="64" type="uint64"/> | ||
| 28 | + <reg name="r18" bitsize="64" type="uint64"/> | ||
| 29 | + <reg name="r19" bitsize="64" type="uint64"/> | ||
| 30 | + <reg name="r20" bitsize="64" type="uint64"/> | ||
| 31 | + <reg name="r21" bitsize="64" type="uint64"/> | ||
| 32 | + <reg name="r22" bitsize="64" type="uint64"/> | ||
| 33 | + <reg name="r23" bitsize="64" type="uint64"/> | ||
| 34 | + <reg name="r24" bitsize="64" type="uint64"/> | ||
| 35 | + <reg name="r25" bitsize="64" type="uint64"/> | ||
| 36 | + <reg name="r26" bitsize="64" type="uint64"/> | ||
| 37 | + <reg name="r27" bitsize="64" type="uint64"/> | ||
| 38 | + <reg name="r28" bitsize="64" type="uint64"/> | ||
| 39 | + <reg name="r29" bitsize="64" type="uint64"/> | ||
| 40 | + <reg name="r30" bitsize="64" type="uint64"/> | ||
| 41 | + <reg name="r31" bitsize="64" type="uint64"/> | ||
| 42 | + | ||
| 43 | + <reg name="pc" bitsize="64" type="code_ptr" regnum="64"/> | ||
| 44 | + <reg name="msr" bitsize="64" type="uint64"/> | ||
| 45 | + <reg name="cr" bitsize="32" type="uint32"/> | ||
| 46 | + <reg name="lr" bitsize="64" type="code_ptr"/> | ||
| 47 | + <reg name="ctr" bitsize="64" type="uint64"/> | ||
| 48 | + <reg name="xer" bitsize="32" type="uint32"/> | ||
| 49 | +</feature> |