gwj / at91sam9263 · Commits

Commit c7d344af8fb308975f941de1640b917e1b085a81

Authored by bellard
1 parent e1a2849c

- remove the ugly "stop" pseudo-opcode. 

- fix fsqrt instruction (there's no fsqrt.).
- floating point load and store are not integer instructions.
- wrong opcode for dcba instructions.
(Jocelyn Mayer)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1378 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 22 additions and 16 deletions
target-ppc/translate.c
  View file @c7d344a
... ... @@ -325,12 +325,6 @@ GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE)
325 325 RET_INVAL(ctx);
326 326 }
327 327  
328   -/* Special opcode to stop emulation */
329   -GEN_HANDLER(stop, 0x06, 0x00, 0xFF, 0x03FFFFC1, PPC_COMMON)
330   -{
331   - RET_EXCP(ctx, EXCP_HLT, 0);
332   -}
333   -
334 328 static opc_handler_t invalid_handler = {
335 329 .inval = 0xFFFFFFFF,
336 330 .type = PPC_NONE,
... ... @@ -867,7 +861,19 @@ _GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0);
867 861 GEN_FLOAT_AB(sub, 0x14, 0x000007C0);
868 862 /* Optional: */
869 863 /* fsqrt */
870   -GEN_FLOAT_BS(sqrt, 0x3F, 0x16);
  864 +GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT)
  865 +{
  866 + if (!ctx->fpu_enabled) {
  867 + RET_EXCP(ctx, EXCP_NO_FP, 0);
  868 + return;
  869 + }
  870 + gen_op_reset_scrfx();
  871 + gen_op_load_fpr_FT0(rB(ctx->opcode));
  872 + gen_op_fsqrt();
  873 + gen_op_store_FT0_fpr(rD(ctx->opcode));
  874 + if (Rc(ctx->opcode))
  875 + gen_op_set_Rc1();
  876 +}
871 877  
872 878 GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT)
873 879 {
... ... @@ -1434,7 +1440,7 @@ GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x03FF0801, PPC_MEM)
1434 1440  
1435 1441 /*** Floating-point load ***/
1436 1442 #define GEN_LDF(width, opc) \
1437   -GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
  1443 +GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
1438 1444 { \
1439 1445 uint32_t simm = SIMM(ctx->opcode); \
1440 1446 if (!ctx->fpu_enabled) { \
... ... @@ -1453,7 +1459,7 @@ GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
1453 1459 }
1454 1460  
1455 1461 #define GEN_LDUF(width, opc) \
1456   -GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
  1462 +GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
1457 1463 { \
1458 1464 uint32_t simm = SIMM(ctx->opcode); \
1459 1465 if (!ctx->fpu_enabled) { \
... ... @@ -1474,7 +1480,7 @@ GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
1474 1480 }
1475 1481  
1476 1482 #define GEN_LDUXF(width, opc) \
1477   -GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \
  1483 +GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \
1478 1484 { \
1479 1485 if (!ctx->fpu_enabled) { \
1480 1486 RET_EXCP(ctx, EXCP_NO_FP, 0); \
... ... @@ -1494,7 +1500,7 @@ GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \
1494 1500 }
1495 1501  
1496 1502 #define GEN_LDXF(width, opc2, opc3) \
1497   -GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER) \
  1503 +GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \
1498 1504 { \
1499 1505 if (!ctx->fpu_enabled) { \
1500 1506 RET_EXCP(ctx, EXCP_NO_FP, 0); \
... ... @@ -1525,7 +1531,7 @@ GEN_LDFS(fs, 0x10);
1525 1531  
1526 1532 /*** Floating-point store ***/
1527 1533 #define GEN_STF(width, opc) \
1528   -GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
  1534 +GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
1529 1535 { \
1530 1536 uint32_t simm = SIMM(ctx->opcode); \
1531 1537 if (!ctx->fpu_enabled) { \
... ... @@ -1544,7 +1550,7 @@ GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
1544 1550 }
1545 1551  
1546 1552 #define GEN_STUF(width, opc) \
1547   -GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
  1553 +GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
1548 1554 { \
1549 1555 uint32_t simm = SIMM(ctx->opcode); \
1550 1556 if (!ctx->fpu_enabled) { \
... ... @@ -1564,7 +1570,7 @@ GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
1564 1570 }
1565 1571  
1566 1572 #define GEN_STUXF(width, opc) \
1567   -GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \
  1573 +GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \
1568 1574 { \
1569 1575 if (!ctx->fpu_enabled) { \
1570 1576 RET_EXCP(ctx, EXCP_NO_FP, 0); \
... ... @@ -1583,7 +1589,7 @@ GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \
1583 1589 }
1584 1590  
1585 1591 #define GEN_STXF(width, opc2, opc3) \
1586   -GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER) \
  1592 +GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \
1587 1593 { \
1588 1594 if (!ctx->fpu_enabled) { \
1589 1595 RET_EXCP(ctx, EXCP_NO_FP, 0); \
... ... @@ -2370,7 +2376,7 @@ GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE)
2370 2376  
2371 2377 /* Optional: */
2372 2378 /* dcba */
2373   -GEN_HANDLER(dcba, 0x1F, 0x16, 0x07, 0x03E00001, PPC_CACHE_OPT)
  2379 +GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_OPT)
2374 2380 {
2375 2381 }
2376 2382  
... ...