Commit c185970a0e3c72b5f70bad599c4160d037427c81
1 parent
beb811bd
Enforce even float register pair for double register ops (Aurelien Jarno)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2624 c046a42c-6fe2-441c-8c8c-71466251a162
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target-sparc/translate.c
| @@ -90,7 +90,7 @@ enum { | @@ -90,7 +90,7 @@ enum { | ||
| 90 | #ifdef TARGET_SPARC64 | 90 | #ifdef TARGET_SPARC64 |
| 91 | #define DFPREG(r) (((r & 1) << 6) | (r & 0x1e)) | 91 | #define DFPREG(r) (((r & 1) << 6) | (r & 0x1e)) |
| 92 | #else | 92 | #else |
| 93 | -#define DFPREG(r) (r) | 93 | +#define DFPREG(r) (r & 0x1e) |
| 94 | #endif | 94 | #endif |
| 95 | 95 | ||
| 96 | #ifdef USE_DIRECT_JUMP | 96 | #ifdef USE_DIRECT_JUMP |