Commit c169c906a374774bde50834f360821ec6ba9b53a
1 parent
17444c9c
added undocumented FPU ops support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1156 c046a42c-6fe2-441c-8c8c-71466251a162
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target-i386/translate.c
@@ -2958,6 +2958,8 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | @@ -2958,6 +2958,8 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | ||
2958 | gen_op_fmov_ST0_STN((opreg + 1) & 7); | 2958 | gen_op_fmov_ST0_STN((opreg + 1) & 7); |
2959 | break; | 2959 | break; |
2960 | case 0x09: /* fxchg sti */ | 2960 | case 0x09: /* fxchg sti */ |
2961 | + case 0x29: /* fxchg4 sti, undocumented op */ | ||
2962 | + case 0x39: /* fxchg7 sti, undocumented op */ | ||
2961 | gen_op_fxchg_ST0_STN(opreg); | 2963 | gen_op_fxchg_ST0_STN(opreg); |
2962 | break; | 2964 | break; |
2963 | case 0x0a: /* grp d9/2 */ | 2965 | case 0x0a: /* grp d9/2 */ |
@@ -3104,10 +3106,13 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | @@ -3104,10 +3106,13 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | ||
3104 | } | 3106 | } |
3105 | break; | 3107 | break; |
3106 | case 0x02: /* fcom */ | 3108 | case 0x02: /* fcom */ |
3109 | + case 0x22: /* fcom2, undocumented op */ | ||
3107 | gen_op_fmov_FT0_STN(opreg); | 3110 | gen_op_fmov_FT0_STN(opreg); |
3108 | gen_op_fcom_ST0_FT0(); | 3111 | gen_op_fcom_ST0_FT0(); |
3109 | break; | 3112 | break; |
3110 | case 0x03: /* fcomp */ | 3113 | case 0x03: /* fcomp */ |
3114 | + case 0x23: /* fcomp3, undocumented op */ | ||
3115 | + case 0x32: /* fcomp5, undocumented op */ | ||
3111 | gen_op_fmov_FT0_STN(opreg); | 3116 | gen_op_fmov_FT0_STN(opreg); |
3112 | gen_op_fcom_ST0_FT0(); | 3117 | gen_op_fcom_ST0_FT0(); |
3113 | gen_op_fpop(); | 3118 | gen_op_fpop(); |
@@ -3163,6 +3168,9 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | @@ -3163,6 +3168,9 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | ||
3163 | gen_op_fmov_STN_ST0(opreg); | 3168 | gen_op_fmov_STN_ST0(opreg); |
3164 | break; | 3169 | break; |
3165 | case 0x2b: /* fstp sti */ | 3170 | case 0x2b: /* fstp sti */ |
3171 | + case 0x0b: /* fstp1 sti, undocumented op */ | ||
3172 | + case 0x3a: /* fstp8 sti, undocumented op */ | ||
3173 | + case 0x3b: /* fstp9 sti, undocumented op */ | ||
3166 | gen_op_fmov_STN_ST0(opreg); | 3174 | gen_op_fmov_STN_ST0(opreg); |
3167 | gen_op_fpop(); | 3175 | gen_op_fpop(); |
3168 | break; | 3176 | break; |
@@ -3187,6 +3195,10 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | @@ -3187,6 +3195,10 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) | ||
3187 | goto illegal_op; | 3195 | goto illegal_op; |
3188 | } | 3196 | } |
3189 | break; | 3197 | break; |
3198 | + case 0x38: /* ffreep sti, undocumented op */ | ||
3199 | + gen_op_ffree_STN(opreg); | ||
3200 | + gen_op_fpop(); | ||
3201 | + break; | ||
3190 | case 0x3c: /* df/4 */ | 3202 | case 0x3c: /* df/4 */ |
3191 | switch(rm) { | 3203 | switch(rm) { |
3192 | case 0: | 3204 | case 0: |