gwj / at91sam9263 · Commits

Commit bfa30a38968c204725a007e6cf845178231d3645

Authored by blueswir1
1 parent d6c1a327

Change sysctrl register to 32 bits (original patch by Robert Reif) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3533 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 76 additions and 20 deletions
hw/slavio_misc.c
  View file @bfa30a3
... ... @@ -44,10 +44,13 @@ typedef struct MiscState {
44 44 qemu_irq irq;
45 45 uint8_t config;
46 46 uint8_t aux1, aux2;
47   - uint8_t diag, mctrl, sysctrl;
  47 + uint8_t diag, mctrl;
  48 + uint32_t sysctrl;
48 49 } MiscState;
49 50  
50 51 #define MISC_SIZE 1
  52 +#define SYSCTRL_MAXADDR 3
  53 +#define SYSCTRL_SIZE (SYSCTRL_MAXADDR + 1)
51 54  
52 55 static void slavio_misc_update_irq(void *opaque)
53 56 {
... ... @@ -83,7 +86,8 @@ void slavio_set_power_fail(void *opaque, int power_failing)
83 86 slavio_misc_update_irq(s);
84 87 }
85 88  
86   -static void slavio_misc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
  89 +static void slavio_misc_mem_writeb(void *opaque, target_phys_addr_t addr,
  90 + uint32_t val)
87 91 {
88 92 MiscState *s = opaque;
89 93  
... ... @@ -116,13 +120,6 @@ static void slavio_misc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32
116 120 MISC_DPRINTF("Write modem control %2.2x\n", val & 0xff);
117 121 s->mctrl = val & 0xff;
118 122 break;
119   - case 0x1f00000:
120   - MISC_DPRINTF("Write system control %2.2x\n", val & 0xff);
121   - if (val & 1) {
122   - s->sysctrl = 0x2;
123   - qemu_system_reset_request();
124   - }
125   - break;
126 123 case 0xa000000:
127 124 MISC_DPRINTF("Write power management %2.2x\n", val & 0xff);
128 125 cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT);
... ... @@ -156,10 +153,6 @@ static uint32_t slavio_misc_mem_readb(void *opaque, target_phys_addr_t addr)
156 153 ret = s->mctrl;
157 154 MISC_DPRINTF("Read modem control %2.2x\n", ret);
158 155 break;
159   - case 0x1f00000:
160   - MISC_DPRINTF("Read system control %2.2x\n", ret);
161   - ret = s->sysctrl;
162   - break;
163 156 case 0xa000000:
164 157 MISC_DPRINTF("Read power management %2.2x\n", ret);
165 158 break;
... ... @@ -179,10 +172,62 @@ static CPUWriteMemoryFunc *slavio_misc_mem_write[3] = {
179 172 slavio_misc_mem_writeb,
180 173 };
181 174  
  175 +static uint32_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr)
  176 +{
  177 + MiscState *s = opaque;
  178 + uint32_t ret = 0, saddr;
  179 +
  180 + saddr = addr & SYSCTRL_MAXADDR;
  181 + switch (saddr) {
  182 + case 0:
  183 + ret = s->sysctrl;
  184 + break;
  185 + default:
  186 + break;
  187 + }
  188 + MISC_DPRINTF("Read system control reg 0x" TARGET_FMT_plx " = %x\n", addr,
  189 + ret);
  190 + return ret;
  191 +}
  192 +
  193 +static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr,
  194 + uint32_t val)
  195 +{
  196 + MiscState *s = opaque;
  197 + uint32_t saddr;
  198 +
  199 + saddr = addr & SYSCTRL_MAXADDR;
  200 + MISC_DPRINTF("Write system control reg 0x" TARGET_FMT_plx " = %x\n", addr,
  201 + val);
  202 + switch (saddr) {
  203 + case 0:
  204 + if (val & 1) {
  205 + s->sysctrl = 0x2;
  206 + qemu_system_reset_request();
  207 + }
  208 + break;
  209 + default:
  210 + break;
  211 + }
  212 +}
  213 +
  214 +static CPUReadMemoryFunc *slavio_sysctrl_mem_read[3] = {
  215 + slavio_sysctrl_mem_readl,
  216 + slavio_sysctrl_mem_readl,
  217 + slavio_sysctrl_mem_readl,
  218 +};
  219 +
  220 +static CPUWriteMemoryFunc *slavio_sysctrl_mem_write[3] = {
  221 + slavio_sysctrl_mem_writel,
  222 + slavio_sysctrl_mem_writel,
  223 + slavio_sysctrl_mem_writel,
  224 +};
  225 +
182 226 static void slavio_misc_save(QEMUFile *f, void *opaque)
183 227 {
184 228 MiscState *s = opaque;
185 229 int tmp;
  230 + uint8_t tmp8;
186 231  
187 232 tmp = 0;
188 233 qemu_put_be32s(f, &tmp); /* ignored, was IRQ. */
... ... @@ -191,13 +236,15 @@ static void slavio_misc_save(QEMUFile *f, void *opaque)
191 236 qemu_put_8s(f, &s->aux2);
192 237 qemu_put_8s(f, &s->diag);
193 238 qemu_put_8s(f, &s->mctrl);
194   - qemu_put_8s(f, &s->sysctrl);
  239 + tmp8 = s->sysctrl & 0xff;
  240 + qemu_put_8s(f, &tmp8);
195 241 }
196 242  
197 243 static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
198 244 {
199 245 MiscState *s = opaque;
200 246 int tmp;
  247 + uint8_t tmp8;
201 248  
202 249 if (version_id != 1)
203 250 return -EINVAL;
... ... @@ -208,7 +255,8 @@ static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
208 255 qemu_get_8s(f, &s->aux2);
209 256 qemu_get_8s(f, &s->diag);
210 257 qemu_get_8s(f, &s->mctrl);
211   - qemu_get_8s(f, &s->sysctrl);
  258 + qemu_get_8s(f, &tmp8);
  259 + s->sysctrl = (uint32_t)tmp8;
212 260 return 0;
213 261 }
214 262  
... ... @@ -222,7 +270,9 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
222 270 if (!s)
223 271 return NULL;
224 272  
225   - slavio_misc_io_memory = cpu_register_io_memory(0, slavio_misc_mem_read, slavio_misc_mem_write, s);
  273 + /* 8 bit registers */
  274 + slavio_misc_io_memory = cpu_register_io_memory(0, slavio_misc_mem_read,
  275 + slavio_misc_mem_write, s);
226 276 // Slavio control
227 277 cpu_register_physical_memory(base + 0x1800000, MISC_SIZE,
228 278 slavio_misc_io_memory);
... ... @@ -238,15 +288,21 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
238 288 // Modem control
239 289 cpu_register_physical_memory(base + 0x1b00000, MISC_SIZE,
240 290 slavio_misc_io_memory);
241   - // System control
242   - cpu_register_physical_memory(base + 0x1f00000, MISC_SIZE,
243   - slavio_misc_io_memory);
244 291 // Power management
245 292 cpu_register_physical_memory(power_base, MISC_SIZE, slavio_misc_io_memory);
246 293  
  294 + /* 32 bit registers */
  295 + slavio_misc_io_memory = cpu_register_io_memory(0, slavio_sysctrl_mem_read,
  296 + slavio_sysctrl_mem_write,
  297 + s);
  298 + // System control
  299 + cpu_register_physical_memory(base + 0x1f00000, SYSCTRL_SIZE,
  300 + slavio_misc_io_memory);
  301 +
247 302 s->irq = irq;
248 303  
249   - register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load, s);
  304 + register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load,
  305 + s);
250 306 qemu_register_reset(slavio_misc_reset, s);
251 307 slavio_misc_reset(s);
252 308 return s;
... ...