Commit bdf9f35dad46b3f20235b9a19f0a6633362e10ed
1 parent
8393617c
Convert add
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2 changed files
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99 additions
and
21 deletions
target-sparc/op_helper.c
@@ -756,6 +756,17 @@ static uint32_t compute_C_flags(void) | @@ -756,6 +756,17 @@ static uint32_t compute_C_flags(void) | ||
756 | return env->psr & PSR_CARRY; | 756 | return env->psr & PSR_CARRY; |
757 | } | 757 | } |
758 | 758 | ||
759 | +static inline uint32_t get_NZ_icc(target_ulong dst) | ||
760 | +{ | ||
761 | + uint32_t ret = 0; | ||
762 | + | ||
763 | + if (!(dst & 0xffffffffULL)) | ||
764 | + ret |= PSR_ZERO; | ||
765 | + if ((int32_t) (dst & 0xffffffffULL) < 0) | ||
766 | + ret |= PSR_NEG; | ||
767 | + return ret; | ||
768 | +} | ||
769 | + | ||
759 | #ifdef TARGET_SPARC64 | 770 | #ifdef TARGET_SPARC64 |
760 | static uint32_t compute_all_flags_xcc(void) | 771 | static uint32_t compute_all_flags_xcc(void) |
761 | { | 772 | { |
@@ -767,6 +778,86 @@ static uint32_t compute_C_flags_xcc(void) | @@ -767,6 +778,86 @@ static uint32_t compute_C_flags_xcc(void) | ||
767 | return env->xcc & PSR_CARRY; | 778 | return env->xcc & PSR_CARRY; |
768 | } | 779 | } |
769 | 780 | ||
781 | +static inline uint32_t get_NZ_xcc(target_ulong dst) | ||
782 | +{ | ||
783 | + uint32_t ret = 0; | ||
784 | + | ||
785 | + if (!dst) | ||
786 | + ret |= PSR_ZERO; | ||
787 | + if ((int64_t)dst < 0) | ||
788 | + ret |= PSR_NEG; | ||
789 | + return ret; | ||
790 | +} | ||
791 | +#endif | ||
792 | + | ||
793 | +static inline uint32_t get_C_add_icc(target_ulong dst, target_ulong src1) | ||
794 | +{ | ||
795 | + uint32_t ret = 0; | ||
796 | + | ||
797 | + if ((dst & 0xffffffffULL) < (src1 & 0xffffffffULL)) | ||
798 | + ret |= PSR_CARRY; | ||
799 | + return ret; | ||
800 | +} | ||
801 | + | ||
802 | +static inline uint32_t get_V_add_icc(target_ulong dst, target_ulong src1, | ||
803 | + target_ulong src2) | ||
804 | +{ | ||
805 | + uint32_t ret = 0; | ||
806 | + | ||
807 | + if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1ULL << 31)) | ||
808 | + ret |= PSR_OVF; | ||
809 | + return ret; | ||
810 | +} | ||
811 | + | ||
812 | +static uint32_t compute_all_add(void) | ||
813 | +{ | ||
814 | + uint32_t ret; | ||
815 | + | ||
816 | + ret = get_NZ_icc(CC_DST); | ||
817 | + ret |= get_C_add_icc(CC_DST, CC_SRC); | ||
818 | + ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2); | ||
819 | + return ret; | ||
820 | +} | ||
821 | + | ||
822 | +static uint32_t compute_C_add(void) | ||
823 | +{ | ||
824 | + return get_C_add_icc(CC_DST, CC_SRC); | ||
825 | +} | ||
826 | + | ||
827 | +#ifdef TARGET_SPARC64 | ||
828 | +static inline uint32_t get_C_add_xcc(target_ulong dst, target_ulong src1) | ||
829 | +{ | ||
830 | + uint32_t ret = 0; | ||
831 | + | ||
832 | + if (dst < src1) | ||
833 | + ret |= PSR_CARRY; | ||
834 | + return ret; | ||
835 | +} | ||
836 | + | ||
837 | +static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1, | ||
838 | + target_ulong src2) | ||
839 | +{ | ||
840 | + uint32_t ret = 0; | ||
841 | + | ||
842 | + if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1ULL << 63)) | ||
843 | + ret |= PSR_OVF; | ||
844 | + return ret; | ||
845 | +} | ||
846 | + | ||
847 | +static uint32_t compute_all_add_xcc(void) | ||
848 | +{ | ||
849 | + uint32_t ret; | ||
850 | + | ||
851 | + ret = get_NZ_xcc(CC_DST); | ||
852 | + ret |= get_C_add_xcc(CC_DST, CC_SRC); | ||
853 | + ret |= get_V_add_xcc(CC_DST, CC_SRC, CC_SRC2); | ||
854 | + return ret; | ||
855 | +} | ||
856 | + | ||
857 | +static uint32_t compute_C_add_xcc(void) | ||
858 | +{ | ||
859 | + return get_C_add_xcc(CC_DST, CC_SRC); | ||
860 | +} | ||
770 | #endif | 861 | #endif |
771 | 862 | ||
772 | typedef struct CCTable { | 863 | typedef struct CCTable { |
@@ -777,12 +868,14 @@ typedef struct CCTable { | @@ -777,12 +868,14 @@ typedef struct CCTable { | ||
777 | static const CCTable icc_table[CC_OP_NB] = { | 868 | static const CCTable icc_table[CC_OP_NB] = { |
778 | /* CC_OP_DYNAMIC should never happen */ | 869 | /* CC_OP_DYNAMIC should never happen */ |
779 | [CC_OP_FLAGS] = { compute_all_flags, compute_C_flags }, | 870 | [CC_OP_FLAGS] = { compute_all_flags, compute_C_flags }, |
871 | + [CC_OP_ADD] = { compute_all_add, compute_C_add }, | ||
780 | }; | 872 | }; |
781 | 873 | ||
782 | #ifdef TARGET_SPARC64 | 874 | #ifdef TARGET_SPARC64 |
783 | static const CCTable xcc_table[CC_OP_NB] = { | 875 | static const CCTable xcc_table[CC_OP_NB] = { |
784 | /* CC_OP_DYNAMIC should never happen */ | 876 | /* CC_OP_DYNAMIC should never happen */ |
785 | [CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc }, | 877 | [CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc }, |
878 | + [CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc }, | ||
786 | }; | 879 | }; |
787 | #endif | 880 | #endif |
788 | 881 |
target-sparc/translate.c
@@ -459,27 +459,12 @@ static inline void gen_tag_tv(TCGv src1, TCGv src2) | @@ -459,27 +459,12 @@ static inline void gen_tag_tv(TCGv src1, TCGv src2) | ||
459 | gen_set_label(l1); | 459 | gen_set_label(l1); |
460 | } | 460 | } |
461 | 461 | ||
462 | -static inline void gen_op_add_cc2(TCGv dst) | ||
463 | -{ | ||
464 | - gen_cc_clear_icc(); | ||
465 | - gen_cc_NZ_icc(cpu_cc_dst); | ||
466 | - gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src); | ||
467 | - gen_cc_V_add_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2); | ||
468 | -#ifdef TARGET_SPARC64 | ||
469 | - gen_cc_clear_xcc(); | ||
470 | - gen_cc_NZ_xcc(cpu_cc_dst); | ||
471 | - gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src); | ||
472 | - gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2); | ||
473 | -#endif | ||
474 | - tcg_gen_mov_tl(dst, cpu_cc_dst); | ||
475 | -} | ||
476 | - | ||
477 | static inline void gen_op_addi_cc(TCGv dst, TCGv src1, target_long src2) | 462 | static inline void gen_op_addi_cc(TCGv dst, TCGv src1, target_long src2) |
478 | { | 463 | { |
479 | tcg_gen_mov_tl(cpu_cc_src, src1); | 464 | tcg_gen_mov_tl(cpu_cc_src, src1); |
480 | tcg_gen_movi_tl(cpu_cc_src2, src2); | 465 | tcg_gen_movi_tl(cpu_cc_src2, src2); |
481 | tcg_gen_addi_tl(cpu_cc_dst, cpu_cc_src, src2); | 466 | tcg_gen_addi_tl(cpu_cc_dst, cpu_cc_src, src2); |
482 | - gen_op_add_cc2(dst); | 467 | + tcg_gen_mov_tl(dst, cpu_cc_dst); |
483 | } | 468 | } |
484 | 469 | ||
485 | static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2) | 470 | static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2) |
@@ -487,7 +472,7 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2) | @@ -487,7 +472,7 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2) | ||
487 | tcg_gen_mov_tl(cpu_cc_src, src1); | 472 | tcg_gen_mov_tl(cpu_cc_src, src1); |
488 | tcg_gen_mov_tl(cpu_cc_src2, src2); | 473 | tcg_gen_mov_tl(cpu_cc_src2, src2); |
489 | tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2); | 474 | tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2); |
490 | - gen_op_add_cc2(dst); | 475 | + tcg_gen_mov_tl(dst, cpu_cc_dst); |
491 | } | 476 | } |
492 | 477 | ||
493 | static inline void gen_op_addx_cc2(TCGv dst) | 478 | static inline void gen_op_addx_cc2(TCGv dst) |
@@ -3153,16 +3138,16 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3153,16 +3138,16 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3153 | simm = GET_FIELDs(insn, 19, 31); | 3138 | simm = GET_FIELDs(insn, 19, 31); |
3154 | if (xop & 0x10) { | 3139 | if (xop & 0x10) { |
3155 | gen_op_addi_cc(cpu_dst, cpu_src1, simm); | 3140 | gen_op_addi_cc(cpu_dst, cpu_src1, simm); |
3156 | - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); | ||
3157 | - dc->cc_op = CC_OP_FLAGS; | 3141 | + tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD); |
3142 | + dc->cc_op = CC_OP_ADD; | ||
3158 | } else { | 3143 | } else { |
3159 | tcg_gen_addi_tl(cpu_dst, cpu_src1, simm); | 3144 | tcg_gen_addi_tl(cpu_dst, cpu_src1, simm); |
3160 | } | 3145 | } |
3161 | } else { | 3146 | } else { |
3162 | if (xop & 0x10) { | 3147 | if (xop & 0x10) { |
3163 | gen_op_add_cc(cpu_dst, cpu_src1, cpu_src2); | 3148 | gen_op_add_cc(cpu_dst, cpu_src1, cpu_src2); |
3164 | - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); | ||
3165 | - dc->cc_op = CC_OP_FLAGS; | 3149 | + tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD); |
3150 | + dc->cc_op = CC_OP_ADD; | ||
3166 | } else { | 3151 | } else { |
3167 | tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); | 3152 | tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); |
3168 | } | 3153 | } |