gwj / at91sam9263 · Commits

Commit bd8ee11a6b19343f4ad0a1c5d16869584f609369

Authored by Sebastian Herbszt
Committed by Anthony Liguori
1 parent 28c2c264

lsi53c895a: Implement Scratch Byte Register 

Fixes the following errors:

lsi_scsi: error: Unhandled writeb 0x3a = 0x0
lsi_scsi: error: readb 0x3a

Signed-off-by: Sebastian Herbszt <herbszt@gmx.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Inline Side-by-side
Showing 1 changed file with 7 additions and 0 deletions
hw/lsi53c895a.c
  View file @bd8ee11
@@ -262,6 +262,7 @@ typedef struct { @@ -262,6 +262,7 @@ typedef struct {
262 uint32_t sbc; 262 uint32_t sbc;
263 uint32_t csbc; 263 uint32_t csbc;
264 uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */ 264 uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */
  265 + uint8_t sbr;
265 266
266 /* Script ram is stored as 32-bit words in host byteorder. */ 267 /* Script ram is stored as 32-bit words in host byteorder. */
267 uint32_t script_ram[2048]; 268 uint32_t script_ram[2048];
@@ -330,6 +331,7 @@ static void lsi_soft_reset(LSIState *s) @@ -330,6 +331,7 @@ static void lsi_soft_reset(LSIState *s)
330 s->ia = 0; 331 s->ia = 0;
331 s->sbc = 0; 332 s->sbc = 0;
332 s->csbc = 0; 333 s->csbc = 0;
  334 + s->sbr = 0;
333 } 335 }
334 336
335 static int lsi_dma_40bit(LSIState *s) 337 static int lsi_dma_40bit(LSIState *s)
@@ -1408,6 +1410,8 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset) @@ -1408,6 +1410,8 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
1408 return s->dmode; 1410 return s->dmode;
1409 case 0x39: /* DIEN */ 1411 case 0x39: /* DIEN */
1410 return s->dien; 1412 return s->dien;
  1413 + case 0x3a: /* SBR */
  1414 + return s->sbr;
1411 case 0x3b: /* DCNTL */ 1415 case 0x3b: /* DCNTL */
1412 return s->dcntl; 1416 return s->dcntl;
1413 case 0x40: /* SIEN0 */ 1417 case 0x40: /* SIEN0 */
@@ -1622,6 +1626,9 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) @@ -1622,6 +1626,9 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
1622 s->dien = val; 1626 s->dien = val;
1623 lsi_update_irq(s); 1627 lsi_update_irq(s);
1624 break; 1628 break;
  1629 + case 0x3a: /* SBR */
  1630 + s->sbr = val;
  1631 + break;
1625 case 0x3b: /* DCNTL */ 1632 case 0x3b: /* DCNTL */
1626 s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD); 1633 s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD);
1627 if ((val & LSI_DCNTL_STD) && (s->istat1 & LSI_ISTAT1_SRUN) == 0) 1634 if ((val & LSI_DCNTL_STD) && (s->istat1 & LSI_ISTAT1_SRUN) == 0)