Commit bd568f1849220f67d187adbc67f968febd986bd7
1 parent
d38ff489
ppc: Convert nip moves to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5160 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
2 changed files
with
12 additions
and
38 deletions
target-ppc/op.c
@@ -46,20 +46,6 @@ void OPPROTO op_raise_exception_err (void) | @@ -46,20 +46,6 @@ void OPPROTO op_raise_exception_err (void) | ||
46 | do_raise_exception_err(PARAM1, PARAM2); | 46 | do_raise_exception_err(PARAM1, PARAM2); |
47 | } | 47 | } |
48 | 48 | ||
49 | -void OPPROTO op_update_nip (void) | ||
50 | -{ | ||
51 | - env->nip = (uint32_t)PARAM1; | ||
52 | - RETURN(); | ||
53 | -} | ||
54 | - | ||
55 | -#if defined(TARGET_PPC64) | ||
56 | -void OPPROTO op_update_nip_64 (void) | ||
57 | -{ | ||
58 | - env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | ||
59 | - RETURN(); | ||
60 | -} | ||
61 | -#endif | ||
62 | - | ||
63 | void OPPROTO op_debug (void) | 49 | void OPPROTO op_debug (void) |
64 | { | 50 | { |
65 | do_raise_exception(EXCP_DEBUG); | 51 | do_raise_exception(EXCP_DEBUG); |
@@ -465,8 +451,6 @@ void OPPROTO op_store_fpscr (void) | @@ -465,8 +451,6 @@ void OPPROTO op_store_fpscr (void) | ||
465 | } | 451 | } |
466 | 452 | ||
467 | /* Branch */ | 453 | /* Branch */ |
468 | -#define EIP env->nip | ||
469 | - | ||
470 | void OPPROTO op_setlr (void) | 454 | void OPPROTO op_setlr (void) |
471 | { | 455 | { |
472 | env->lr = (uint32_t)PARAM1; | 456 | env->lr = (uint32_t)PARAM1; |
@@ -481,20 +465,6 @@ void OPPROTO op_setlr_64 (void) | @@ -481,20 +465,6 @@ void OPPROTO op_setlr_64 (void) | ||
481 | } | 465 | } |
482 | #endif | 466 | #endif |
483 | 467 | ||
484 | -void OPPROTO op_b_T1 (void) | ||
485 | -{ | ||
486 | - env->nip = (uint32_t)(T1 & ~3); | ||
487 | - RETURN(); | ||
488 | -} | ||
489 | - | ||
490 | -#if defined (TARGET_PPC64) | ||
491 | -void OPPROTO op_b_T1_64 (void) | ||
492 | -{ | ||
493 | - env->nip = (uint64_t)(T1 & ~3); | ||
494 | - RETURN(); | ||
495 | -} | ||
496 | -#endif | ||
497 | - | ||
498 | void OPPROTO op_jz_T0 (void) | 468 | void OPPROTO op_jz_T0 (void) |
499 | { | 469 | { |
500 | if (!T0) | 470 | if (!T0) |
target-ppc/translate.c
@@ -60,6 +60,7 @@ static TCGv cpu_gprh[32]; | @@ -60,6 +60,7 @@ static TCGv cpu_gprh[32]; | ||
60 | static TCGv cpu_fpr[32]; | 60 | static TCGv cpu_fpr[32]; |
61 | static TCGv cpu_avrh[32], cpu_avrl[32]; | 61 | static TCGv cpu_avrh[32], cpu_avrl[32]; |
62 | static TCGv cpu_crf[8]; | 62 | static TCGv cpu_crf[8]; |
63 | +static TCGv cpu_nip; | ||
63 | 64 | ||
64 | /* dyngen register indexes */ | 65 | /* dyngen register indexes */ |
65 | static TCGv cpu_T[3]; | 66 | static TCGv cpu_T[3]; |
@@ -164,6 +165,9 @@ void ppc_translate_init(void) | @@ -164,6 +165,9 @@ void ppc_translate_init(void) | ||
164 | p += (i < 10) ? 6 : 7; | 165 | p += (i < 10) ? 6 : 7; |
165 | } | 166 | } |
166 | 167 | ||
168 | + cpu_nip = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, | ||
169 | + offsetof(CPUState, nip), "nip"); | ||
170 | + | ||
167 | /* register helpers */ | 171 | /* register helpers */ |
168 | #undef DEF_HELPER | 172 | #undef DEF_HELPER |
169 | #define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name); | 173 | #define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name); |
@@ -268,10 +272,10 @@ static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip) | @@ -268,10 +272,10 @@ static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip) | ||
268 | { | 272 | { |
269 | #if defined(TARGET_PPC64) | 273 | #if defined(TARGET_PPC64) |
270 | if (ctx->sf_mode) | 274 | if (ctx->sf_mode) |
271 | - gen_op_update_nip_64(nip >> 32, nip); | 275 | + tcg_gen_movi_tl(cpu_nip, nip); |
272 | else | 276 | else |
273 | #endif | 277 | #endif |
274 | - gen_op_update_nip(nip); | 278 | + tcg_gen_movi_tl(cpu_nip, (uint32_t)nip); |
275 | } | 279 | } |
276 | 280 | ||
277 | #define GEN_EXCP(ctx, excp, error) \ | 281 | #define GEN_EXCP(ctx, excp, error) \ |
@@ -2836,19 +2840,19 @@ static always_inline void gen_goto_tb (DisasContext *ctx, int n, | @@ -2836,19 +2840,19 @@ static always_inline void gen_goto_tb (DisasContext *ctx, int n, | ||
2836 | tcg_gen_movi_tl(cpu_T[1], dest); | 2840 | tcg_gen_movi_tl(cpu_T[1], dest); |
2837 | #if defined(TARGET_PPC64) | 2841 | #if defined(TARGET_PPC64) |
2838 | if (ctx->sf_mode) | 2842 | if (ctx->sf_mode) |
2839 | - gen_op_b_T1_64(); | 2843 | + tcg_gen_andi_tl(cpu_nip, cpu_T[1], ~3); |
2840 | else | 2844 | else |
2841 | #endif | 2845 | #endif |
2842 | - gen_op_b_T1(); | 2846 | + tcg_gen_andi_tl(cpu_nip, cpu_T[1], (uint32_t)~3); |
2843 | tcg_gen_exit_tb((long)tb + n); | 2847 | tcg_gen_exit_tb((long)tb + n); |
2844 | } else { | 2848 | } else { |
2845 | tcg_gen_movi_tl(cpu_T[1], dest); | 2849 | tcg_gen_movi_tl(cpu_T[1], dest); |
2846 | #if defined(TARGET_PPC64) | 2850 | #if defined(TARGET_PPC64) |
2847 | if (ctx->sf_mode) | 2851 | if (ctx->sf_mode) |
2848 | - gen_op_b_T1_64(); | 2852 | + tcg_gen_andi_tl(cpu_nip, cpu_T[1], ~3); |
2849 | else | 2853 | else |
2850 | #endif | 2854 | #endif |
2851 | - gen_op_b_T1(); | 2855 | + tcg_gen_andi_tl(cpu_nip, cpu_T[1], (uint32_t)~3); |
2852 | if (unlikely(ctx->singlestep_enabled)) { | 2856 | if (unlikely(ctx->singlestep_enabled)) { |
2853 | if ((ctx->singlestep_enabled & | 2857 | if ((ctx->singlestep_enabled & |
2854 | (CPU_BRANCH_STEP | CPU_SINGLE_STEP)) && | 2858 | (CPU_BRANCH_STEP | CPU_SINGLE_STEP)) && |
@@ -2969,10 +2973,10 @@ static always_inline void gen_bcond (DisasContext *ctx, int type) | @@ -2969,10 +2973,10 @@ static always_inline void gen_bcond (DisasContext *ctx, int type) | ||
2969 | } else { | 2973 | } else { |
2970 | #if defined(TARGET_PPC64) | 2974 | #if defined(TARGET_PPC64) |
2971 | if (ctx->sf_mode) | 2975 | if (ctx->sf_mode) |
2972 | - gen_op_b_T1_64(); | 2976 | + tcg_gen_andi_tl(cpu_nip, cpu_T[1], ~3); |
2973 | else | 2977 | else |
2974 | #endif | 2978 | #endif |
2975 | - gen_op_b_T1(); | 2979 | + tcg_gen_andi_tl(cpu_nip, cpu_T[1], (uint32_t)~3); |
2976 | goto no_test; | 2980 | goto no_test; |
2977 | } | 2981 | } |
2978 | break; | 2982 | break; |