Commit bb928dbef23c7202dcad43aa3efa580ed5c68072

Authored by aurel32
1 parent d66c7132

target-mips: don't map zero register as a TCG global

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7094 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 1 additions and 1 deletions
target-mips/translate.c
@@ -8491,7 +8491,7 @@ static void mips_tcg_init(void) @@ -8491,7 +8491,7 @@ static void mips_tcg_init(void)
8491 return; 8491 return;
8492 8492
8493 cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); 8493 cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
8494 - for (i = 0; i < 32; i++) 8494 + for (i = 1; i < 32; i++)
8495 cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0, 8495 cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
8496 offsetof(CPUState, active_tc.gpr[i]), 8496 offsetof(CPUState, active_tc.gpr[i]),
8497 regnames[i]); 8497 regnames[i]);