Commit bb433bef5ad177ff95c2c18afe4957bd987687be
1 parent
0b64d008
Remove superfluous gt64xxx_pci_mapping calls.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3064 c046a42c-6fe2-441c-8c8c-71466251a162
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3 additions
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7 deletions
hw/gt64xxx.c
@@ -330,36 +330,33 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, | @@ -330,36 +330,33 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, | ||
330 | case GT_PCI0M0LD: | 330 | case GT_PCI0M0LD: |
331 | s->regs[GT_PCI0M0LD] = val & 0x00007fff; | 331 | s->regs[GT_PCI0M0LD] = val & 0x00007fff; |
332 | s->regs[GT_PCI0M0REMAP] = val & 0x000007ff; | 332 | s->regs[GT_PCI0M0REMAP] = val & 0x000007ff; |
333 | - gt64120_pci_mapping(s); | ||
334 | break; | 333 | break; |
335 | case GT_PCI0M1LD: | 334 | case GT_PCI0M1LD: |
336 | s->regs[GT_PCI0M1LD] = val & 0x00007fff; | 335 | s->regs[GT_PCI0M1LD] = val & 0x00007fff; |
337 | s->regs[GT_PCI0M1REMAP] = val & 0x000007ff; | 336 | s->regs[GT_PCI0M1REMAP] = val & 0x000007ff; |
338 | - gt64120_pci_mapping(s); | ||
339 | break; | 337 | break; |
340 | case GT_PCI1IOLD: | 338 | case GT_PCI1IOLD: |
341 | s->regs[GT_PCI1IOLD] = val & 0x00007fff; | 339 | s->regs[GT_PCI1IOLD] = val & 0x00007fff; |
342 | s->regs[GT_PCI1IOREMAP] = val & 0x000007ff; | 340 | s->regs[GT_PCI1IOREMAP] = val & 0x000007ff; |
343 | - gt64120_pci_mapping(s); | ||
344 | break; | 341 | break; |
345 | case GT_PCI1M0LD: | 342 | case GT_PCI1M0LD: |
346 | s->regs[GT_PCI1M0LD] = val & 0x00007fff; | 343 | s->regs[GT_PCI1M0LD] = val & 0x00007fff; |
347 | s->regs[GT_PCI1M0REMAP] = val & 0x000007ff; | 344 | s->regs[GT_PCI1M0REMAP] = val & 0x000007ff; |
348 | - gt64120_pci_mapping(s); | ||
349 | break; | 345 | break; |
350 | case GT_PCI1M1LD: | 346 | case GT_PCI1M1LD: |
351 | s->regs[GT_PCI1M1LD] = val & 0x00007fff; | 347 | s->regs[GT_PCI1M1LD] = val & 0x00007fff; |
352 | s->regs[GT_PCI1M1REMAP] = val & 0x000007ff; | 348 | s->regs[GT_PCI1M1REMAP] = val & 0x000007ff; |
353 | - gt64120_pci_mapping(s); | ||
354 | break; | 349 | break; |
355 | case GT_PCI0IOHD: | 350 | case GT_PCI0IOHD: |
351 | + s->regs[saddr] = val & 0x0000007f; | ||
352 | + gt64120_pci_mapping(s); | ||
353 | + break; | ||
356 | case GT_PCI0M0HD: | 354 | case GT_PCI0M0HD: |
357 | case GT_PCI0M1HD: | 355 | case GT_PCI0M1HD: |
358 | case GT_PCI1IOHD: | 356 | case GT_PCI1IOHD: |
359 | case GT_PCI1M0HD: | 357 | case GT_PCI1M0HD: |
360 | case GT_PCI1M1HD: | 358 | case GT_PCI1M1HD: |
361 | s->regs[saddr] = val & 0x0000007f; | 359 | s->regs[saddr] = val & 0x0000007f; |
362 | - gt64120_pci_mapping(s); | ||
363 | break; | 360 | break; |
364 | case GT_ISD: | 361 | case GT_ISD: |
365 | s->regs[saddr] = val & 0x00007fff; | 362 | s->regs[saddr] = val & 0x00007fff; |
@@ -373,7 +370,6 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, | @@ -373,7 +370,6 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, | ||
373 | case GT_PCI1M0REMAP: | 370 | case GT_PCI1M0REMAP: |
374 | case GT_PCI1M1REMAP: | 371 | case GT_PCI1M1REMAP: |
375 | s->regs[saddr] = val & 0x000007ff; | 372 | s->regs[saddr] = val & 0x000007ff; |
376 | - gt64120_pci_mapping(s); | ||
377 | break; | 373 | break; |
378 | 374 | ||
379 | /* CPU Error Report */ | 375 | /* CPU Error Report */ |