gwj / at91sam9263 · Commits

Commit ba7cd150ff7617d1c9b491d6b9c25a1e74fdf708

Authored by bellard
1 parent 19e6c4b8

FPU fixes 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4445 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 11 additions and 11 deletions
target-i386/translate.c
  View file @ba7cd15
... ... @@ -4535,12 +4535,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4535 4535  
4536 4536 switch(op >> 4) {
4537 4537 case 0:
4538   - gen_op_ld_T0_A0(OT_LONG);
  4538 + gen_op_ld_T0_A0(OT_LONG + s->mem_index);
4539 4539 tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
4540 4540 tcg_gen_helper_0_1(helper_flds_FT0, cpu_tmp2);
4541 4541 break;
4542 4542 case 1:
4543   - gen_op_ld_T0_A0(OT_LONG);
  4543 + gen_op_ld_T0_A0(OT_LONG + s->mem_index);
4544 4544 tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
4545 4545 tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2);
4546 4546 break;
... ... @@ -4551,7 +4551,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4551 4551 break;
4552 4552 case 3:
4553 4553 default:
4554   - gen_op_ld_T0_A0(OT_WORD);
  4554 + gen_op_lds_T0_A0(OT_WORD + s->mem_index);
4555 4555 tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
4556 4556 tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2);
4557 4557 break;
... ... @@ -4574,12 +4574,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4574 4574 case 0:
4575 4575 switch(op >> 4) {
4576 4576 case 0:
4577   - gen_op_ld_T0_A0(OT_LONG);
  4577 + gen_op_ld_T0_A0(OT_LONG + s->mem_index);
4578 4578 tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
4579 4579 tcg_gen_helper_0_1(helper_flds_ST0, cpu_tmp2);
4580 4580 break;
4581 4581 case 1:
4582   - gen_op_ld_T0_A0(OT_LONG);
  4582 + gen_op_ld_T0_A0(OT_LONG + s->mem_index);
4583 4583 tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
4584 4584 tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2);
4585 4585 break;
... ... @@ -4590,7 +4590,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4590 4590 break;
4591 4591 case 3:
4592 4592 default:
4593   - gen_op_ld_T0_A0(OT_WORD);
  4593 + gen_op_lds_T0_A0(OT_WORD + s->mem_index);
4594 4594 tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
4595 4595 tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2);
4596 4596 break;
... ... @@ -4602,7 +4602,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4602 4602 case 1:
4603 4603 tcg_gen_helper_1_0(helper_fisttl_ST0, cpu_tmp2);
4604 4604 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
4605   - gen_op_st_T0_A0(OT_LONG);
  4605 + gen_op_st_T0_A0(OT_LONG + s->mem_index);
4606 4606 break;
4607 4607 case 2:
4608 4608 tcg_gen_helper_1_0(helper_fisttll_ST0, cpu_tmp1);
... ... @@ -4613,7 +4613,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4613 4613 default:
4614 4614 tcg_gen_helper_1_0(helper_fistt_ST0, cpu_tmp2);
4615 4615 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
4616   - gen_op_st_T0_A0(OT_WORD);
  4616 + gen_op_st_T0_A0(OT_WORD + s->mem_index);
4617 4617 break;
4618 4618 }
4619 4619 tcg_gen_helper_0_0(helper_fpop);
... ... @@ -4623,12 +4623,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4623 4623 case 0:
4624 4624 tcg_gen_helper_1_0(helper_fsts_ST0, cpu_tmp2);
4625 4625 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
4626   - gen_op_st_T0_A0(OT_LONG);
  4626 + gen_op_st_T0_A0(OT_LONG + s->mem_index);
4627 4627 break;
4628 4628 case 1:
4629 4629 tcg_gen_helper_1_0(helper_fistl_ST0, cpu_tmp2);
4630 4630 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
4631   - gen_op_st_T0_A0(OT_LONG);
  4631 + gen_op_st_T0_A0(OT_LONG + s->mem_index);
4632 4632 break;
4633 4633 case 2:
4634 4634 tcg_gen_helper_1_0(helper_fstl_ST0, cpu_tmp1);
... ... @@ -4639,7 +4639,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
4639 4639 default:
4640 4640 tcg_gen_helper_1_0(helper_fist_ST0, cpu_tmp2);
4641 4641 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
4642   - gen_op_st_T0_A0(OT_WORD);
  4642 + gen_op_st_T0_A0(OT_WORD + s->mem_index);
4643 4643 break;
4644 4644 }
4645 4645 if ((op & 7) == 3)
... ...