gwj / at91sam9263 · Commits

Commit b79e175259bd3591cc3abd1ebe8551573927cd56

Authored by aurel32
1 parent d8299bcc

SH4: kill a few warnings 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5938 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 6 changed files with 11 additions and 5 deletions
hw/ide.c
  View file @b79e175
... ... @@ -31,6 +31,7 @@
31 31 #include "qemu-timer.h"
32 32 #include "sysemu.h"
33 33 #include "ppc_mac.h"
  34 +#include "sh.h"
34 35  
35 36 /* debug IDE devices */
36 37 //#define DEBUG_IDE
... ...
hw/pci.h
  View file @b79e175
... ... @@ -139,4 +139,8 @@ PCIBus *pci_prep_init(qemu_irq *pic);
139 139 PCIBus *pci_apb_init(target_phys_addr_t special_base, target_phys_addr_t mem_base,
140 140 qemu_irq *pic);
141 141  
  142 +/* sh_pci.c */
  143 +PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
  144 + qemu_irq *pic, int devfn_min, int nirq);
  145 +
142 146 #endif
... ...
hw/r2d.c
  View file @b79e175
... ... @@ -240,8 +240,8 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
240 240 /* initialization which should be done by firmware */
241 241 uint32_t bcr1 = 1 << 3; /* cs3 SDRAM */
242 242 uint16_t bcr2 = 3 << (3 * 2); /* cs3 32-bit */
243   - cpu_physical_memory_write(SH7750_BCR1_A7, &bcr1, 4);
244   - cpu_physical_memory_write(SH7750_BCR2_A7, &bcr2, 2);
  243 + cpu_physical_memory_write(SH7750_BCR1_A7, (uint8_t *)&bcr1, 4);
  244 + cpu_physical_memory_write(SH7750_BCR2_A7, (uint8_t *)&bcr2, 2);
245 245  
246 246 kernel_size = load_image(kernel_filename, phys_ram_base);
247 247  
... ...
hw/sh_intc.c
  View file @b79e175
... ... @@ -73,7 +73,7 @@ void sh_intc_toggle_source(struct intc_source *source,
73 73 }
74 74 }
75 75  
76   -void sh_intc_set_irq (void *opaque, int n, int level)
  76 +static void sh_intc_set_irq (void *opaque, int n, int level)
77 77 {
78 78 struct intc_desc *desc = opaque;
79 79 struct intc_source *source = &(desc->sources[n]);
... ...
hw/sm501.c
  View file @b79e175
... ... @@ -27,6 +27,7 @@
27 27 #include "hw.h"
28 28 #include "pc.h"
29 29 #include "console.h"
  30 +#include "devices.h"
30 31  
31 32 /*
32 33 * Status: 2008/11/02
... ...
target-sh4/translate.c
  View file @b79e175
... ... @@ -71,7 +71,7 @@ static TCGv_ptr cpu_env;
71 71 static TCGv cpu_gregs[24];
72 72 static TCGv cpu_pc, cpu_sr, cpu_ssr, cpu_spc, cpu_gbr;
73 73 static TCGv cpu_vbr, cpu_sgr, cpu_dbr, cpu_mach, cpu_macl;
74   -static TCGv cpu_pr, cpu_fpscr, cpu_fpul, cpu_flags;
  74 +static TCGv cpu_pr, cpu_fpscr, cpu_fpul;
75 75 static TCGv cpu_fregs[32];
76 76  
77 77 /* internal register indexes */
... ... @@ -181,7 +181,7 @@ void cpu_dump_state(CPUState * env, FILE * f,
181 181 }
182 182 }
183 183  
184   -void cpu_sh4_reset(CPUSH4State * env)
  184 +static void cpu_sh4_reset(CPUSH4State * env)
185 185 {
186 186 #if defined(CONFIG_USER_ONLY)
187 187 env->sr = SR_FD; /* FD - kernel does lazy fpu context switch */
... ...