gwj / at91sam9263 · Commits

Commit b6dc7ebbeaa46d54414de6e5ee86fd4a173ff273

Authored by ths
1 parent 707e011b

Take advantage of subpage support. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2944 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 5 additions and 24 deletions
hw/mips_malta.c
  View file @b6dc7eb
... ... @@ -236,17 +236,7 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
236 236 val = s->brk;
237 237 break;
238 238  
239   - /* UART Registers */
240   - case 0x00900:
241   - case 0x00908:
242   - case 0x00910:
243   - case 0x00918:
244   - case 0x00920:
245   - case 0x00928:
246   - case 0x00930:
247   - case 0x00938:
248   - val = serial_mm_readb(s->uart, addr);
249   - break;
  239 + /* UART Registers are handled directly by the serial device */
250 240  
251 241 /* GPOUT Register */
252 242 case 0x00a00:
... ... @@ -348,17 +338,7 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
348 338 s->brk = val & 0xff;
349 339 break;
350 340  
351   - /* UART Registers */
352   - case 0x00900:
353   - case 0x00908:
354   - case 0x00910:
355   - case 0x00918:
356   - case 0x00920:
357   - case 0x00928:
358   - case 0x00930:
359   - case 0x00938:
360   - serial_mm_writeb(s->uart, addr, val);
361   - break;
  341 + /* UART Registers are handled directly by the serial device */
362 342  
363 343 /* GPOUT Register */
364 344 case 0x00a00:
... ... @@ -430,7 +410,8 @@ MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
430 410 malta = cpu_register_io_memory(0, malta_fpga_read,
431 411 malta_fpga_write, s);
432 412  
433   - cpu_register_physical_memory(base, 0x100000, malta);
  413 + cpu_register_physical_memory(base, 0x900, malta);
  414 + cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta);
434 415  
435 416 s->display = qemu_chr_open("vc");
436 417 qemu_chr_printf(s->display, "\e[HMalta LEDBAR\r\n");
... ... @@ -445,7 +426,7 @@ MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
445 426  
446 427 uart_chr = qemu_chr_open("vc");
447 428 qemu_chr_printf(uart_chr, "CBUS UART\r\n");
448   - s->uart = serial_mm_init(base, 3, env->irq[2], uart_chr, 0);
  429 + s->uart = serial_mm_init(base + 0x900, 3, env->irq[2], uart_chr, 1);
449 430  
450 431 malta_fpga_reset(s);
451 432 qemu_register_reset(malta_fpga_reset, s);
... ...