gwj / at91sam9263 · Commits

Commit b6d17150af9930f28aec1debc41f6c5f9ddcc3ba

Authored by pbrook
1 parent 4a7f0e06

Implement TCG sign extension ops for x86-64. 

Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 27 additions and 0 deletions
tcg/x86_64/tcg-target.c
  View file @b6d1715
@@ -1070,6 +1070,22 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, @@ -1070,6 +1070,22 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
1070 tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]); 1070 tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]);
1071 break; 1071 break;
1072 1072
  1073 + case INDEX_op_ext8s_i32:
  1074 + tcg_out_modrm(s, 0xbe | P_EXT | P_REXB, args[0], args[1]);
  1075 + break;
  1076 + case INDEX_op_ext16s_i32:
  1077 + tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
  1078 + break;
  1079 + case INDEX_op_ext8s_i64:
  1080 + tcg_out_modrm(s, 0xbe | P_EXT | P_REXW, args[0], args[1]);
  1081 + break;
  1082 + case INDEX_op_ext16s_i64:
  1083 + tcg_out_modrm(s, 0xbf | P_EXT | P_REXW, args[0], args[1]);
  1084 + break;
  1085 + case INDEX_op_ext32s_i64:
  1086 + tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
  1087 + break;
  1088 +
1073 case INDEX_op_qemu_ld8u: 1089 case INDEX_op_qemu_ld8u:
1074 tcg_out_qemu_ld(s, args, 0); 1090 tcg_out_qemu_ld(s, args, 0);
1075 break; 1091 break;
@@ -1228,6 +1244,12 @@ static const TCGTargetOpDef x86_64_op_defs[] = { @@ -1228,6 +1244,12 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
1228 { INDEX_op_neg_i32, { "r", "0" } }, 1244 { INDEX_op_neg_i32, { "r", "0" } },
1229 { INDEX_op_neg_i64, { "r", "0" } }, 1245 { INDEX_op_neg_i64, { "r", "0" } },
1230 1246
  1247 + { INDEX_op_ext8s_i32, { "r", "r"} },
  1248 + { INDEX_op_ext16s_i32, { "r", "r"} },
  1249 + { INDEX_op_ext8s_i64, { "r", "r"} },
  1250 + { INDEX_op_ext16s_i64, { "r", "r"} },
  1251 + { INDEX_op_ext32s_i64, { "r", "r"} },
  1252 +
1231 { INDEX_op_qemu_ld8u, { "r", "L" } }, 1253 { INDEX_op_qemu_ld8u, { "r", "L" } },
1232 { INDEX_op_qemu_ld8s, { "r", "L" } }, 1254 { INDEX_op_qemu_ld8s, { "r", "L" } },
1233 { INDEX_op_qemu_ld16u, { "r", "L" } }, 1255 { INDEX_op_qemu_ld16u, { "r", "L" } },
tcg/x86_64/tcg-target.h
  View file @b6d1715
@@ -60,6 +60,11 @@ enum { @@ -60,6 +60,11 @@ enum {
60 #define TCG_TARGET_HAS_bswap_i64 60 #define TCG_TARGET_HAS_bswap_i64
61 #define TCG_TARGET_HAS_neg_i32 61 #define TCG_TARGET_HAS_neg_i32
62 #define TCG_TARGET_HAS_neg_i64 62 #define TCG_TARGET_HAS_neg_i64
  63 +#define TCG_TARGET_HAS_ext8s_i32
  64 +#define TCG_TARGET_HAS_ext16s_i32
  65 +#define TCG_TARGET_HAS_ext8s_i64
  66 +#define TCG_TARGET_HAS_ext16s_i64
  67 +#define TCG_TARGET_HAS_ext32s_i64
63 68
64 /* Note: must be synced with dyngen-exec.h */ 69 /* Note: must be synced with dyngen-exec.h */
65 #define TCG_AREG0 TCG_REG_R14 70 #define TCG_AREG0 TCG_REG_R14