Commit b50a6563d8590675905b730d32f17fa119664e0e
1 parent
3efda49d
Add a qemu_irq_invert() shortcut for inverting a signal.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3485 c046a42c-6fe2-441c-8c8c-71466251a162
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3 changed files
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18 additions
and
19 deletions
hw/irq.c
... | ... | @@ -55,3 +55,14 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n) |
55 | 55 | return s; |
56 | 56 | } |
57 | 57 | |
58 | +static void qemu_notirq(void *opaque, int line, int level) | |
59 | +{ | |
60 | + struct IRQState *irq = opaque; | |
61 | + | |
62 | + irq->handler(irq->opaque, irq->n, !level); | |
63 | +} | |
64 | + | |
65 | +qemu_irq qemu_irq_invert(qemu_irq irq) | |
66 | +{ | |
67 | + return qemu_allocate_irqs(qemu_notirq, irq, 1)[0]; | |
68 | +} | ... | ... |
hw/irq.h
... | ... | @@ -19,3 +19,5 @@ static inline void qemu_irq_lower(qemu_irq irq) |
19 | 19 | /* Returns an array of N IRQs. */ |
20 | 20 | qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n); |
21 | 21 | |
22 | +/* Returns a new IRQ with opposite polarity. */ | |
23 | +qemu_irq qemu_irq_invert(qemu_irq irq); | ... | ... |
hw/palm.c
... | ... | @@ -76,20 +76,13 @@ static CPUWriteMemoryFunc *static_writefn[] = { |
76 | 76 | #define PALMTE_MMC2_GPIO 7 |
77 | 77 | #define PALMTE_MMC3_GPIO 11 |
78 | 78 | |
79 | -static void palmte_pintdav(void *opaque, int line, int level) | |
80 | -{ | |
81 | - struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque; | |
82 | - | |
83 | - qemu_set_irq(omap_gpio_in_get(cpu->gpio)[PALMTE_PINTDAV_GPIO], | |
84 | - !level); | |
85 | -} | |
86 | - | |
87 | 79 | static void palmte_microwire_setup(struct omap_mpu_state_s *cpu) |
88 | 80 | { |
81 | + qemu_irq p_int = omap_gpio_in_get(cpu->gpio)[PALMTE_PINTDAV_GPIO]; | |
82 | + | |
89 | 83 | omap_uwire_attach( |
90 | 84 | cpu->microwire, |
91 | - tsc2102_init( | |
92 | - qemu_allocate_irqs(palmte_pintdav, cpu, 1)[0]), | |
85 | + tsc2102_init(qemu_irq_invert(p_int)), | |
93 | 86 | 0); |
94 | 87 | } |
95 | 88 | |
... | ... | @@ -122,14 +115,6 @@ static void palmte_button_event(void *opaque, int keycode) |
122 | 115 | !(keycode & 0x80)); |
123 | 116 | } |
124 | 117 | |
125 | -static void palmte_mmc_cover(void *opaque, int line, int level) | |
126 | -{ | |
127 | - struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque; | |
128 | - | |
129 | - qemu_set_irq(omap_mpuio_in_get(cpu->mpuio)[PALMTE_MMC_SWITCH_GPIO], | |
130 | - !level); | |
131 | -} | |
132 | - | |
133 | 118 | static void palmte_init(int ram_size, int vga_ram_size, int boot_device, |
134 | 119 | DisplayState *ds, const char **fd_filename, int snapshot, |
135 | 120 | const char *kernel_filename, const char *kernel_cmdline, |
... | ... | @@ -174,7 +159,8 @@ static void palmte_init(int ram_size, int vga_ram_size, int boot_device, |
174 | 159 | |
175 | 160 | omap_mmc_handlers(cpu->mmc, |
176 | 161 | omap_gpio_in_get(cpu->gpio)[PALMTE_MMC_WP_GPIO], |
177 | - qemu_allocate_irqs(palmte_mmc_cover, cpu, 1)[0]); | |
162 | + qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio) | |
163 | + [PALMTE_MMC_SWITCH_GPIO])); | |
178 | 164 | |
179 | 165 | /* Setup initial (reset) machine state */ |
180 | 166 | if (nb_option_roms) { | ... | ... |