Commit b4ff59872759eb491313ae4248732d9a2acc1299
1 parent
526ff7de
removed warning
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1194 c046a42c-6fe2-441c-8c8c-71466251a162
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22 additions
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17 deletions
target-sparc/cpu.h
| @@ -29,23 +29,6 @@ | @@ -29,23 +29,6 @@ | ||
| 29 | #define PSR_PS (1<<6) | 29 | #define PSR_PS (1<<6) |
| 30 | #define PSR_ET (1<<5) | 30 | #define PSR_ET (1<<5) |
| 31 | #define PSR_CWP 0x1f | 31 | #define PSR_CWP 0x1f |
| 32 | -/* Fake impl 0, version 4 */ | ||
| 33 | -#define GET_PSR(env) ((0 << 28) | (4 << 24) | env->psr | \ | ||
| 34 | - (env->psref? PSR_EF : 0) | \ | ||
| 35 | - (env->psrpil << 8) | \ | ||
| 36 | - (env->psrs? PSR_S : 0) | \ | ||
| 37 | - (env->psrs? PSR_PS : 0) | \ | ||
| 38 | - (env->psret? PSR_ET : 0) | env->cwp) | ||
| 39 | - | ||
| 40 | -#define PUT_PSR(env, val) do { int _tmp = val; \ | ||
| 41 | - env->psr = _tmp & ~PSR_ICC; \ | ||
| 42 | - env->psref = (_tmp & PSR_EF)? 1 : 0; \ | ||
| 43 | - env->psrpil = (_tmp & PSR_PIL) >> 8; \ | ||
| 44 | - env->psrs = (_tmp & PSR_S)? 1 : 0; \ | ||
| 45 | - env->psrps = (_tmp & PSR_PS)? 1 : 0; \ | ||
| 46 | - env->psret = (_tmp & PSR_ET)? 1 : 0; \ | ||
| 47 | - set_cwp(_tmp & PSR_CWP & (NWINDOWS - 1)); \ | ||
| 48 | - } while (0) | ||
| 49 | 32 | ||
| 50 | /* Trap base register */ | 33 | /* Trap base register */ |
| 51 | #define TBR_BASE_MASK 0xfffff000 | 34 | #define TBR_BASE_MASK 0xfffff000 |
| @@ -171,6 +154,28 @@ int cpu_sparc_close(CPUSPARCState *s); | @@ -171,6 +154,28 @@ int cpu_sparc_close(CPUSPARCState *s); | ||
| 171 | void cpu_get_fp64(uint64_t *pmant, uint16_t *pexp, double f); | 154 | void cpu_get_fp64(uint64_t *pmant, uint16_t *pexp, double f); |
| 172 | double cpu_put_fp64(uint64_t mant, uint16_t exp); | 155 | double cpu_put_fp64(uint64_t mant, uint16_t exp); |
| 173 | 156 | ||
| 157 | +/* Fake impl 0, version 4 */ | ||
| 158 | +#define GET_PSR(env) ((0 << 28) | (4 << 24) | env->psr | \ | ||
| 159 | + (env->psref? PSR_EF : 0) | \ | ||
| 160 | + (env->psrpil << 8) | \ | ||
| 161 | + (env->psrs? PSR_S : 0) | \ | ||
| 162 | + (env->psrs? PSR_PS : 0) | \ | ||
| 163 | + (env->psret? PSR_ET : 0) | env->cwp) | ||
| 164 | + | ||
| 165 | +#ifndef NO_CPU_IO_DEFS | ||
| 166 | +void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); | ||
| 167 | +#endif | ||
| 168 | + | ||
| 169 | +#define PUT_PSR(env, val) do { int _tmp = val; \ | ||
| 170 | + env->psr = _tmp & ~PSR_ICC; \ | ||
| 171 | + env->psref = (_tmp & PSR_EF)? 1 : 0; \ | ||
| 172 | + env->psrpil = (_tmp & PSR_PIL) >> 8; \ | ||
| 173 | + env->psrs = (_tmp & PSR_S)? 1 : 0; \ | ||
| 174 | + env->psrps = (_tmp & PSR_PS)? 1 : 0; \ | ||
| 175 | + env->psret = (_tmp & PSR_ET)? 1 : 0; \ | ||
| 176 | + cpu_set_cwp(env, _tmp & PSR_CWP & (NWINDOWS - 1)); \ | ||
| 177 | + } while (0) | ||
| 178 | + | ||
| 174 | struct siginfo; | 179 | struct siginfo; |
| 175 | int cpu_sparc_signal_handler(int hostsignum, struct siginfo *info, void *puc); | 180 | int cpu_sparc_signal_handler(int hostsignum, struct siginfo *info, void *puc); |
| 176 | 181 |